Quad layout

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A circuit layout in which two transistors are arranged in such a way that interference remains as low as possible is referred to as a quad layout . For this purpose, both transistors are divided into two parallel-connected partial transistors and these four partial transistors are arranged crosswise.

With this arrangement, interference is minimized in that such interference (e.g. temperature gradients , doping gradients ) are averaged between the two transistors and parameters of the circuit that are linearly dependent thereon are compensated.

The quad layout is a special form of the common centroid layout .