Scalable Coherent Interface

The Scalable Coherent Interface (SCI, English ) is in the computer art a Busähnliche connection between multi-processor systems .

It was laid down in the IEEE 1596 standard and implemented in various CC Numa architectures. The standard describes a physical interface and a protocol for memory management , especially cache management and maintaining data coherence .

The interface is designed as a unidirectional point-to-point for transfer rates between 1 Gbit / s (bit serial) and 1 Gbyte / s (16 bit parallel).

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• Andrew S. Tanenbaum , James Goodman: Computer Architecture Pearson Studies, 2001, ISBN 3-8273-7016-7 .
• Thomas Flik: Microprocessor Technology Springer-Verlag, 2001 ISBN 3-540-42042-8 .