DPLL: Difference between revisions
Content deleted Content added
m clean up using AWB |
m added Category:Monitored short pages |
||
Line 4: | Line 4: | ||
* [[Digital phase-locked loop]], an electronic feedback system that generates a signal |
* [[Digital phase-locked loop]], an electronic feedback system that generates a signal |
||
{{ |
{{Disambiguation}} |
||
{{Short pages monitor}}<!-- This long comment was added to the page to prevent it from being listed on Special:Shortpages. It and the accompanying monitoring template were generated via Template:Long comment. Please do not remove the monitor template without removing the comment as well.--> |
Revision as of 01:56, 24 December 2015
DPLL stands for:
- DPLL algorithm, for solving the boolean satisfiability problem
- Digital phase-locked loop, an electronic feedback system that generates a signal