Memory page

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A memory page ( English page , in German also tile called) is in the computer science a by the computer architecture and the operating system defined number of directly successive memory locations in the logical memory space. The main memory is divided into equally large memory pages.

Using memory pages enables the operating system to carry out virtual memory management . The entire working memory is divided into tiles and each address is interpreted as a logical address in this computer architecture by the Memory Management Unit (MMU) and converted into a physical address. In the MMU there is generally a so-called descriptor cache ( Translation Lookaside Buffer ), in which the last page addresses and the associated page addresses are temporarily stored on a hardware basis and thus the access to the physical memory (main memory) can be accelerated . If the page number for a current logical address is not in the descriptor cache, the MMU must access the page table in the main memory .

A portion of the logical address are place via the page address in memory to be used, the tile , while the other portion of the relative address, the offset , within the tile is addressed. The offset thus specifies the size of a tile .


In IA32 architectures, every 32-bit address is interpreted as follows:

  • 20 bits indicate the selected memory page, i.e. a maximum of 2 20 memory pages.
  • 12 bits indicate the offset in the memory page , i.e. 2 12 bytes equal 4  KiB (each entry in the page is 1 byte in size), is the total size of a memory page specified by the operating system and, at the same time, the size of the tile.
Page addressing (paging)