Address computer (machine command)

Processors can be distinguished by a large number of properties. One of the most elementary properties is the number of address details in the machine command. This property is decisive for the computer structure and the processor type.

0 address commands / stack computer

Data work of a 0-address computer

The commands of the ALU are 0 address commands with included / implicit addressing, which means that the ALU operations read and write directly from the top of stack (or top of stack - 1). When writing to the TOS, the stack contents below are shifted downwards and when reading the stack contents below are "lifted up".

However, all memory accesses take place via PUSH Var and POP Var , i.e. 1-address commands.

example

calculation

${\ displaystyle a = (x + y) \ cdot c}$

Assembly code

PUSH X
PUSH Y
ADD
PUSH C
MULT
POP A

1-address commands / accumulator calculator

The commands of the ALU are 1-address commands with included / implicit addressing as the 1st source (and destination) and with memory access as the 2nd source. The memory is accessed via 1-address commands, as an example on the VIP LDA X (load X into the accumulator register) and STA X (save the contents of the accumulator register in X)

Data work of a 1-address computer

example

calculation

${\ displaystyle a = (x + y) \ cdot c}$

Assembler code (using the example of the VIP )

LDA X
ADD Y
MULT C
STA A

2 address commands / typically CISC computers

Data work of a 2-address computer

The accumulator register has been replaced by a general register memory, in the GPR image . The memory cells are used, for example, as index registers, data registers, address registers, etc.

Transport commands and commands in the ALU are 2-address commands with a register address as the first source and destination and a register / memory address as the second source.

example

calculation

${\ displaystyle a = (x + y) \ cdot c}$

Assembly code

MOVE.W R1,X
ADD.W R1,Y
MULT.W R1,C
MOVE.W A,R1

3-address commands / typical RISC computer

Data work of a 3-address computer

The accumulator register has been replaced by a general register memory, in the GPR image . This register memory permits 3-port memory access, i.e. two read accesses and one write access at the same time. This guarantees support for assembly line processing.

example

calculation

${\ displaystyle a = (x + y) \ cdot c}$

Assembly code

LD.W r1, X               ; (r_x) laden
LD.W r2, Y               ; (r_y) laden
ADD r1, r1, r2           ; r1 := r1 + r2
LD.W r2, C               ; (r_c) laden
MULT r2, r2, r1          ; r2 := r2 * r1
ST.W r2, A               ; (r_a) zurückschreiben

literature

Thomas Flik: Microprocessor technology and computer structures. 7th edition. Springer, Berlin 2005, ISBN 3-540-22270-7
Andrew S. Tanenbaum : Computer Architecture. Structures - Concepts - Basics . 5th edition. Munich 2005, ISBN 3-8273-7151-1
Matthias Quantity: Modern processor architectures. Principles and their realizations . 1st edition. Springer, Berlin 2005, ISBN 3-540-24390-9