# Bit value

The **bit value** defines the value of an individual bit , which it should have due to its position within a binary number (also called a binary number ). This definition is also important for serial data transmission and for parallel buses in data processing .

If eight bits are grouped into bytes and these in turn into larger number formats, the byte order must also be specified.

The **bit numbering** is independent of the byte order (byte endianness) and of the "bit endianness".

## LSB 0 bit numbering

If the bits within a binary number according **LSB 0** numbered, bit by having *the lowest* priority ( English *least significant bit* ) the number 0 (= is the bit with index 0).

If bit position 0 is the *least significant* for a binary number with the digits , then its value must be multiplied by. The total value of the binary number is:

## MSB 0 bit numbering

If the bits within a binary number according **MSB 0** numbered, bit by having *the highest* priority (English *most significant bit* ) the number 0 (= is the bit with index 0).

If bit position 0 is the *most significant* for a binary number with the positions , then its value must be multiplied by. The total value of the binary number is:

## Bit order

If the digits are plotted horizontally from left to right according to their descending value ( *these are the illustrations on the left in the two previous sections; the reverse / mirrored case is also possible: the digits are* plotted *horizontally* from right to left *according to their decreasing value **, that is the two figures on the right* ), it depends on the bit sequence on which side the bit numbering starts:

- If the counting starts with 0 for the least significant bit (LSB) on the right-hand side and runs to the left, one speaks of "LSB
_{0}". - If the counting starts with 0 for the most significant bit (MSB) on the left side and runs to the right, we speak of "MSB
_{0}".

MSB | LSB | ||||||||

Bit number at | LSB 0 | 7th | 6th | 5 | 4th | 3 | 2 | 1 | 0 |

MSB 0 | 0 | 1 | 2 | 3 | 4th | 5 | 6th | 7th | |

Content of the bit | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | |

Digit value (decimal) | 128 | 64 | 32 | 16 | 8th | 4th | 2 | 1 |

## Number format and sign bit

The most significant bit (MSB) also indicates in one's complement , two's complement and other number formats with a signed bit whether the corresponding decimal number is positive or negative. With two's complement, the zero is one of the non-negative numbers, so that more negative than positive numbers can be represented. With other number formats like the one's complement or floating point numbers according to the IEEE-754 standard, there are *two* representations of the zero (+0 and −0).

## Addressing bits

The same assumptions as in the "Byte order" article are assumed.

For most computers used in practice, the smallest addressable unit consists of more than one bit, e.g. B. from a byte that contains 8 bits. As a result, a single bit cannot be addressed directly.

However, if a bit offset *BitOffset* ∈ 0.1,…, 7 is added to a byte address , then a single bit can be clearly specified. This type of specification is called **bit addressing** . It can be implemented via the detour of register shifts .

The terms left / right in such shift commands have nothing to do with left / right as described above, but are based exclusively on the usual view:

- the left shift multiplies a binary number by a power of two, thus shifting the bits in the direction of the "big end" (= direction of the
*most significant bit*) - the right shift reversed.

In the form of *byte address* * 8 + *BitOffset* , bit addressing has the following properties:

Address increment |
Left- Shift |
Right -Shift |
---|---|---|

Big endian |
-1 | +1 |

Little endian |
+1 | -1 |

- Apart from the effects on the two edges of the register, a shift operation by 1 bit means a change of the
*bit*address by 1 (more precisely: a transport of the bit string to a bit address changed by 1), which corresponds to (see table) :- a left shift with big endian a decrease by 1,
- a right shift for big endian an increase by 1,
- a left shift with little endian an increase by 1,
- a right shift with little endian a decrease by 1.

- This becomes immediately apparent in the case of shifts by multiples of 8 bits: A shift operation by 8 bits is the same as 8 shift operations by 1 bit in the same direction. Apart from the edge effects, a shift by 8 bits means a change in the
*byte*address by 1 (decrease / increase as above for individual bits).

However, so that a shift operation by 8 bits does not only consist of edge effects, the register must be wider than 8 bits.

- Result

- The differentiation of the bits can be mapped to a unique addressing (numbering) of the same,
*e.g.*in the exemplary form*byte address** 8 +*bit offset*. A single bit can be accessed (after appropriate isolation by bit- by- bit operations ) with the aid of shift operations. Right and left shift (on the same computer) both lead to exactly the same result. The endianness (big or little) of the bytes in the word is transferred to one of the bits in the byte.

With this addressing, the shift operations represent transports of bits by the number of bit positions specified in the shift.

If the lower addresses are placed on the left and the high addresses on the right in the horizontal representation, the bit numbering conventions for 32 bits (i.e. 4 bytes) long bit arrays or unsigned integers can be compared as follows:

Ascending offsets |
Byte offset | 0 | 1 | 2 | 3 |
---|---|---|---|---|---|

Bit offset | 0, 1, ..., 7 | 0, 1, ..., 7 | 0, 1, ..., 7 | 0, 1, ..., 7 | |

Bit number for big endian and |
MSB 0 | 0, 1, ..., 7 | 08, ..., 15 | 16, ..., 23 | 24, ..., 31 |

LSB 0 | 31, ..., 24 | 23, ..., 16 | 15, ..., 08 | 7,…, 1, 0 | |

Bit number for little endian and |
LSB 0 | 0, 1, ..., 7 | 08, ..., 15 | 16, ..., 23 | 24, ..., 31 |

MSB 0 | 31, ..., 24 | 23, ..., 16 | 15, ..., 08 | 7,…, 1, 0 |

The numbering of the bits in *Big-Endian with MSB 0* and *Little-Endian with LSB 0* (both highlighted in color) thus corresponds to the bit address.

In contrast, the conventions *LSB 0 for big-endian* and *MSB 0 for little-endian number* the bits in the register in the opposite direction to their address, which is anticorrelated with an indexing (ascending with the addresses) in an array.