Conditional Sum Addition

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The conditional sum adder (CSA for short) is an electronic circuit for adding multi-digit binary numbers (see also adding network ).

The CSA adds two n-digit binary numbers, so it has 2n inputs. Since the result may include a carry , there are n + 1 outputs.

With the carry-ripple adder , the bits of the two summands are added in parallel, but any carries are passed on sequentially from full adder to full adder, so the running time is quite long. The CSA, on the other hand, calculates the sum according to the divide-and-conquer principle . However, since it is still uncertain whether there is a carryover, everything must be calculated twice (with and without carryover). The correct results are selected using logic.

functionality

• The incoming bit sequences are recursively halved until there are only 1-bit pieces left.
• These are added up.
• Now the results are added recursively again.

The problem that arises with this method is that one does not know whether the less significant additions have a carry when the 1-bit pieces are added in parallel. To solve this problem, all additions are simply carried out both with and without a carry and then the correct result is selected depending on the predecessor.

This principle makes it possible to add in almost logarithmic time .