DIBL effect

As the channel length decreases, the potential of the barrier φB, which has to be overcome by an electron at the source on the way to the drain, is reduced.

The DIBL effect (from English drain-induced barrier lowering , dt.Drain (voltage) -related potential barrier lowering ) is a short-channel effect in MOSFETs , which in its original form refers to a reduction of the threshold voltage of a normally blocking transistor with a higher drain bias ( = Source-drain voltage, ). In the case of a classic planar field effect transistor with a long channel (approx.> 1 µm), the narrowing of the channel is created far enough away from the drain contact that it is electrostatically shielded from the drain by the combination of substrate and gate and the threshold voltage is independent of the Drain bias is. This is no longer the case with a shorter channel. The drain is close enough to affect the channel so that a high drain bias can turn the transistor on prematurely. ${\ textstyle U _ {\ mathrm {DS}}}$

description

The cause of the decrease in threshold voltage can be understood as a consequence of the charge neutrality. In the Yau charge sharing model, this is described as follows: The combined charge in the depletion region and that in the channel of the device is balanced by the charge on the three electrodes: gate, source and drain. When the drain bias is increased, the depletion area of the pn junction between drain and body increases so that it also extends under the gate. The drain thus takes on a larger part of the load of the equalization charge of the depletion region and at the same time reduces the load on the gate. As a result, the charge present on the gate maintains the charge balance by drawing more charge carriers into the channel, which corresponds to a lowering of the threshold voltage of the device.

In the case of an n-channel transistor, the channel attracts more electrons, or in other words, the potential barrier for electrons in the channel is lowered. The term “ barrier lowering ” is therefore used to describe these phenomena . Unfortunately, it is not easy to achieve precise analysis results with the barrier lowering concept.

The barrier lowering increases for decreasing channel lengths, even if the applied drain bias is zero. The cause lies in the pn junctions with the body region, which are generated by the source and drain regions, to which integrated depletion regions are assigned. In the case of short channel lengths, these become no longer negligible proportions in the charge equalization of the component, even if no reverse bias is applied in order to increase the depletion range. In practice, the DIBL value can be calculated as follows:

{\ displaystyle \ mathrm {DIBL} = - {\ frac {U _ {\ mathrm {Th}} ^ {\ mathrm {DD}} -U _ {\ mathrm {Th}} ^ {\ mathrm {low}}} {U_ {\ mathrm {DD}} -U _ {\ mathrm {D}} ^ {\ mathrm {low}}}},}

where (or ) is the threshold voltage in the case of a high drain voltage (in the range of the supply voltage) and (or ) the threshold voltage in the case of a very low drain voltage, typically 0.05 V or 0.1 V. is the supply voltage (for high drain voltage) and for low drain voltage (for the linear part of the IU curve of the transistor). The negative sign in the formula ensures a positive DIBL value because is always less than . Typically, the DIBL value is given in the unit millivolt per volt (mV / V). ${\ displaystyle U _ {\ mathrm {Th}} ^ {\ mathrm {DD}}}$ ${\ displaystyle U _ {\ mathrm {t, sat}}}$ ${\ displaystyle U _ {\ mathrm {Th}} ^ {\ mathrm {low}}}$ ${\ displaystyle U _ {\ mathrm {t, lin}}}$ ${\ displaystyle U _ {\ mathrm {DD}}}$ ${\ displaystyle U _ {\ mathrm {D}} ^ {\ mathrm {low}}}$ ${\ displaystyle U _ {\ mathrm {Th}} ^ {\ mathrm {DD}}}$ ${\ displaystyle U _ {\ mathrm {Th}} ^ {\ mathrm {low}}}$

Extended meaning

In addition, the term DIBL is used to refer to other drain-voltage-related effects in the IU characteristic of MOSFETs. If the channel length is reduced, the impact of DIBL show in the sub-threshold region (engl. Sub-threshold region , at weak inversion) can first as a simple implementation in current-gate bias curve with a change in the drain voltage, which is easily modeled . With shorter channel lengths, however, the slope of the current-gate bias curve is reduced, which means that the same change in drain current requires a larger change in gate bias. In the case of extremely short lengths, the component cannot be switched off completely. These effects cannot be modeled as a threshold adjustment.

The DIBL effect also affects the current-drain bias curve in the active mode of a MOSFET. It causes the source-drain current to increase with the drain voltage, which reduces the output resistance of the MOSFET. This increase occurs in addition to the modulation effect of the channel length described above and cannot be modeled as a threshold value setting.

DIBL can also reduce the operating frequency of the component and thus the overall circuit. The relative effect can be described using the following equation:

{\ displaystyle {\ frac {\ Delta f} {f}} = - {\ frac {2 \ \ mathrm {DIBL}} {U _ {\ mathrm {DD}} -U _ {\ mathrm {Th}}}}, }

where are the supply voltage and the threshold voltage. ${\ displaystyle U _ {\ mathrm {DD}}}$ ${\ displaystyle U _ {\ mathrm {Th}}}$

Individual evidence

↑ Narain Arora: Mosfet Modeling for VLSI Simulation: Theory And Practice . World Scientific, 2007, ISBN 981-256-862-X , pp. 197, Fig. 5.14 ( limited preview in the Google book search).
↑ Yannis Tsividis: Operational Modeling of the MOS transistor . 2nd Edition. McGraw-Hill, New York 1999, ISBN 0-07-065523-5 , pp. 268; Fig. 6.11 .

[Arora-1] Narain Arora: Mosfet Modeling for VLSI Simulation: Theory And Practice . World Scientific, 2007, ISBN 981-256-862-X , pp. 197, Fig. 5.14 ( limited preview in the Google book search).

[Tsividis-2] Yannis Tsividis: Operational Modeling of the MOS transistor . 2nd Edition. McGraw-Hill, New York 1999, ISBN 0-07-065523-5 , pp. 268; Fig. 6.11 .