Scan test
In (modern) digital circuits, scan test describes a special procedure for testing structural (i.e. production-related) damage. It is based on a series connection of all flip-flops used in the design with a mode control, so that it is possible to switch back and forth between a serial operating mode in this series connection ( shift operation ) or the normal operating mode of the circuit. The first and last flip-flop are connected to a special input or output in the circuit so that certain test patterns can be pushed into the circuit and read out. With an appropriate switchover strategy between shift and normal operation and a given input bit pattern, a certain output bit pattern results, if this does not occur, a structural error must be assumed that leads to the switching out of the circuit. All elements of this test procedure, the generation of the series connection ( scan chain ) and the generation of input patterns for feeding and output patterns for comparison are taken over by software tools: scan insertion , mostly within the framework of synthesis and ATPG: automatic test pattern generation .