Siemens 80C517

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Infineon's SAB-C515-LN is the predecessor of the 80C517

The Siemens 80C517 is part of the MCS-51 - microcontroller family. A version without a ROM mask was also available as the 80C537, this had to be operated with an external ROM. It was built from around the beginning of the 1990s by the semiconductor division of Siemens AG , which is now known as Infineon .

In contrast to its predecessor, the Siemens 80 (C) 515 (this was also available in a non-CMOS version), it had some significant expansion of the processor core:

  • Instead of a single data pointer (address register for access with 16-bit address to the external memory and the external ROM) there were eight of them
  • A Multiply Divide Unit (MDU) was introduced to significantly speed up arithmetic operations. So that no extensions to the 8051 instruction set were necessary, this unit was controlled like a coprocessor: The values ​​to be processed are determined by writing register values, the type of operation (multiplication or division) and the bit width of the data to be processed was determined by the order of the Register access specified. As a result, however, the MDU was not interrupt-capable and could only be used by one process.

In particular, the problem that the drastically improved computing power through the MDU was only available to one process was a major limitation of this processor. However, the demand for such extensions in the 8051 architecture meant that Siemens was clear about this with the development of the 80C517 became that the computing power of the 8051 architecture was insufficient for a variety of possible microcontroller applications. As a result, together with SGS-Thomson, a proprietary microcontroller architecture with the Siemens designation C166 was developed, which removed many of the limitations of the 8051 or translated them from 8 to 16 bit register width.

Technical specifications

Block diagram of the 80C517 (A).
  • 8 KB on-chip ROM (80C517)
  • 32 KB on-chip ROM (80C517A-5)
  • Versions without ROM (80C537 and 80C517A)
  • Upwards compatible with the 80 (C) 51 and 80C515
  • 256 bytes on-chip RAM
  • additional 2 KB on-chip RAM for the 80C517A
  • Single bit processing
  • Expansion of external RAM up to 64 KB
  • Clock frequency up to 18 MHz
  • On-chip A / D converter with 12 inputs, external or internal start and with an accuracy of 8  bits (80C517) or 10 bits (80C517A).
  • two 16-bit timers
  • Capture / compare units with their own 16-bit timers and 16-bit compare and capture registers
  • 16-bit arithmetic (multiplication, division, shift operations)
  • programmable 16 bit watchdog timer
  • Oscillator watchdog
  • Slow-down mode, idle mode, power-down mode
  • Housing: PLCC 84, PQFP 100

Web links

Commons : MCS-51  - collection of pictures, videos and audio files