Systolic array

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Systolic array is the name for a pipe network of DPUs ( Data Path Units ), usually in a matrix arrangement, through which data streams are clocked - in contrast to the instruction systolic array , through which commands are sent. The term “systolic” is intended to compare the data streams through the array with the bloodstream, with the clock being the pumping heart, so to speak. A normal systolic array does not require any commands, since the operations in the DPUs are automatically triggered by handshake when the data arrives at the respective DPU input "transport-triggered". (There are also mixed forms with instruction-systolic components.) Systolic arrays were a popular research area, especially by mathematicians, in the 1980s in particular. The synthesis methods of that time were therefore exclusively of an algebraic nature (or a linear projection), which is why the use of systolic arrays was limited to applications with regular data dependencies, because these synthesis methods only provided uniform linear pipes. This restriction of practical applicability was lifted by Rainer Kress around 1995 by generalizing the systolic array to the "super-systolic array" by replacing the algebraic methods with simulated annealing . This made non-uniform pipe networks of any shape possible, such as zigzag, spiral, with branches and an infinite number of other shapes. So coarse-grained reconfigurable computing made sense here. The Xputer paradigm was derived from the super-systolic array .

The inventors were Charles Leiserson and HT Kung in 1978, and under the direction of Kung, the concept was tested in hardware and software in various WARP projects at Carnegie Mellon University in the 1980s. In 1988 a collaboration with Intel developed there to build a chip (iWARP) which was to serve as a node for parallel computers based on systolic arrays.

literature

  • M. Foster, H. Kung: Design of Special-Purpose VLSI Chips: Example and Opinions. Proc. ISCA, La Baule, France, 1980
  • N. Petkov: Systolic Parallel Processing. North Holland; 1992
  • R. Kress et al .: A Datapath Synthesis System for the Reconfigurable Datapath Architecture; Asia and South Pacific Design Automation Conference (ASP-DAC'95). Makuhari, Chiba, Japan, Aug./Sept. 1995