Frequency locked loop
Frequency Locked Loop (FLL; " frequency-locked loop") is a method for stabilizing the output frequency of oscillators .
Working principle
The Frequency Locked Loop was developed in 1973 by the Dutch radio amateur Klaas Spaargaren ( amateur radio call sign PA0KSB). The frequency of a Voltage Controlled Oscillator is compared with that of a reference oscillator by an arrangement of logic gates . If the two deviate from each other, a “counting error” occurs, which is formed into a square wave voltage of variable width by a gate and then integrated. The resulting voltage pulls the VCO to its target frequency, which remains constant up to a few Hz. The circuit is also called the "Huff and Puff Oscillator".
The basic principle is similar to a frequency counter . As with simple frequency counters, the reference oscillator specifies a gate time during which the oscillations of the VCO are counted. In contrast to the frequency counter, however, the entire counter reading is not considered after the gate time has elapsed. Instead, the remainder of the division of the counter reading is considered after (implicit) division by the desired frequency grid. So how far the VCO frequency is from the nearest multiple of the grid frequency. The greater this counting error, the more the VCO is triggered in order to adjust it in the direction of the setpoint frequency (a multiple of the grid frequency).
The division of the counter reading is not carried out explicitly, but the gate time is selected as a multiple of the desired grid frequency. It is therefore sufficient to consider whether the lower-order digits of the counter are different from zero.
application
The advantage is that with a space-saving structure, many older transceivers can be retrofitted with digital frequency stabilization. The disadvantage is that control oscillations are possible depending on the structure. With the TTL concept, the control must be switched off manually before a frequency change; In the meantime, microprocessors are mostly used instead of TTL ICs .
Various microcontrollers also have internal FLLs for their own purposes. These are used by the microcontroller, for example, to stabilize an internal, fast, but imprecise RC clock generator with an external, cheap, precise, but slow 32 kHz clock crystal . The RC clock generator then generates a clock that is sufficiently accurate, for example, to comply with the time conditions for various communication protocols for which a free-running RC clock generator would be too imprecise.
Due to the similarity to a frequency counter, it is very easy to build a combined frequency counter / FLL-VCO that not only controls the VCO, but also displays the current frequency.
See also
source
- Eamon Skelton: Frequency display and VFO Stabilizer . In: Elektor 2/1998, p. 28ff