H. Peter Hofstee

Peter Hofstee (April 2007)

H. Peter Hofstee is a Dutch chip designer .

Hofstee is responsible for the architecture of the Synergistic Processor Element (SPE) of the Cell microprocessor developed in cooperation by IBM , Sony and Toshiba . After completing his doctorate at Caltech in 1994 , Hofstee spent two years at the faculty there before joining the IBM Austin Research Laboratory in 1996. There he worked on the first GHz CMOS microprocessor prototype and other powerful processor designs.

In mid-2000 Hofstee strengthened the group responsible for the cell processor. He is responsible for more than 30 patents and more than 60 patent applications, most of which are related to the Cell processor.

Individual evidence

^ ^A ^b H Peter Hofstee: "Cell Broadband Engine Processor and its applications" . In: Stanford EE Computer Systems Colloquium . Stanford. February 22, 2005. Retrieved December 27, 2007.

personal data
SURNAME	Hofstee, H. Peter
BRIEF DESCRIPTION	Dutch chip designer
DATE OF BIRTH	20th century

[2005stanford-1] A ^b H Peter Hofstee: "Cell Broadband Engine Processor and its applications" . In: Stanford EE Computer Systems Colloquium . Stanford. February 22, 2005. Retrieved December 27, 2007.