Storage data register
The memory data register (SDR) or memory buffer register (SPR) is an important register of a main processor in a Von Neumann computer . Together with the memory address register (SAR), it serves as a fast buffer and reduces the negative effects of the Von Neumann bottleneck .
With microprocessors, a distinction is made between data and address buses. In many systems, both buses are different widths.
The memory data register (SDR) or memory buffer register (SPR) - English abbreviations are MDR from memory data register and MBR from memory buffer register is used for the intermediate storage of memory cell contents so that the contents can be used in several independent instructions. This register must therefore have the same width as the memory cells. It behaves like a buffer in that it holds the data until it is stored in the main memory or placed on the bus via a control signal . In order to specify which address of the main memory the memory data register should address, the address is written into the memory address register (SAR, English abbreviation MAR).
In the strict sense, however, it is less of a real register and more of a passive buffer.
literature
- Dietmar PF Möller: Computer structures: Basics of technical informatics . Springer-Verlag, Berlin 2013, ISBN 978-3-540-67638-6 .
- K. Mary Reid, Alan Jarvis, Tracey Stump: IT Practitioners . Heinemann Educational Publishers, Oxford 2003, ISBN 0-435-45469-2 (English).