Ring counter

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A ring counter , also called a ring shift register , is an electronic circuit and a special form of a shift register in which the output of the last register ( flip-flop ) is fed back to the input of the first.

The information in the shift register is shifted by one place with each cycle. After the information has reached the last register, it reaches the first again with the next cycle. The bit pattern stored in the shift register moves cyclically through the ring counter.

If an input frequency is applied to the clock input , output information corresponding to the length of the ring counter and the stored bit pattern is generated as output information.

Ring counter as frequency divider

You can use a ring counter as a frequency divider . Both symmetrical and asymmetrical curve shapes can be achieved at the output. If a ring counter consists of nregisters (flip-flops) and a single signal is stored, frequency division is 1:nachieved.

The behavior shown in the following examples results from a four-stage counter:

Example: default setting 1000

Measure 1: 1000(start of the first cycle)
Measure 2: 0100
Measure 3: 0010
Measure 4: 0001(end of the first cycle)
Measure 5: 1000(start of a new cycle)

The duty cycle is asymmetrical in this case. It can also be made symmetrical by a suitable choice of the bit pattern:

Example: default setting 1100

Measure 1: 1100(start of the first cycle)
Measure 2: 0110
Measure 3: 0011
Measure 4: 1001(end of the first cycle)
Measure 5: 1100(start of a new cycle)

With a suitable choice of the bit pattern and the number of registers, as well as by interconnecting several ring counters, very different transfer functions can be achieved. With a bit pattern 1010, a frequency division of 1: 2 instead of 1: 4 is achieved.

Johnson counter

5-bit Johnson counter as animation

With the Johnson counter (also called Möbius counter ), the value from the output is inverted and transferred to the input. This results in a different behavior than with the non-inverted ring counter.

If all shift registers are initialized with "0" at the beginning, the following cycle results:

Measure 1: 0000(start of the first cycle)
Measure 2: 1000
Measure 3: 1100
Measure 4: 1110
Measure 5: 1111
Measure 6: 0111
Measure 7: 0011
Measure 8: 0001(end of the first cycle)
Measure 9: 0000(start of a new cycle)

This is the Johnson Code .

The clock frequency at the output is symmetrical in this case, and the division ratio is 1: 8 for a four-stage counter.