Segmentation (memory management)
In the context of computing machines, segmentation means the contextual ( address register ) availability of memory areas. At the time of the 8- and 16-bit microprocessors, segmentation was the only way to address more than 64Ki words of memory via a memory channel. In the course of the development of the operating systems and processors, segmentation was further developed into a protective mechanism and paging . With 32-bit processors and fully supporting 32-bit operating systems (such as Microsoft Windows XP ) as well as 32-bit user software, segmentation was abolished in its original form.
Processors with segmentation usually contain several segmentation registers and hardware to extend 16-bit addresses to the physically available address lines (often 20 or 24) using the segmentation register. The implementation without internal hardware support was carried out using a memory management unit as an external IC . An example of the latter approach is the Game Boy sold by Nintendo in the 1990s , whose games often contained an MMU and so despite the Z80, for example. B. 1 MiB ROM used.
From the end of the 1990s, there was only the purpose of subdivision to implement protective mechanisms or virtual memory management. Depending on the operating system and the underlying hardware , different attributes can be assigned to a segment. For example, program , data and stack segments can be defined. For the Intel x86 architecture, these attributes result directly from the segmentation registers of the Intel 8086 , the processor of the first IBM PC. The memory management then ensures, among other things, that only commands , but not data, are read from the program segment or, conversely, that data in the data segment are not interpreted as commands . Often, it is also possible to segments privilege levels assigned, can be accessed so that the corresponding segments of programs only certain privilege levels. For example, you can protect operating system data and commands from being accessed by other programs. The type of access (e.g. read only, write only, no access) can often be restricted. Some systems also allow privilege level-dependent access type restrictions.
Memory addressing when segmenting
A segment is defined by two values:
- Segment start address, segment base or base: the first memory address contained in the segment
- Segment length, segment limit or limit: the number of consecutive memory addresses that the segment comprises.
As a rule, the physical address space is segmented directly or a virtual linear address space that maps to the physical address space . The segmentation creates a so-called logical address space. Logical addresses are divided into a segment selector and an offset. The segment selector determines, directly or indirectly, via a segment management table, the addressed segment and thus the segment start address and length. The offset indicates the storage location within this segment relative to the start of the segment.
If the linear address is to be determined from a logical address, the segment properties base, length, type, read / write rights, etc. are first determined using the segment selector. The segment properties determined are then used to check whether memory access is permitted. In addition, the offset is compared with the segment length to ensure that the access is within the segment limits. If one of these checks fails, error handling ( interrupt , exception, etc.) is initiated. The offset is added to the segment base address and results in the linear address. If the linear address space is not the physical one, the linear address is converted into a physical address by a subsequent page administration ( English paging unit ).
These address conversions are usually carried out in modern computers by memory management units which are integrated in many modern processors .
Examples
Intel's x86 processors in real mode
With the 8086 processor and newer x86s in real mode , the segment start address is calculated directly from the segment selector of the logical address. All segments have a fixed length of 64 KiB . A logical address is usually written in real mode programs like this: segment : offset , which are segment and offset 16-bit numbers and usually in hexadecimal be specified, so for example: 2F10:87A1.
This logical address is converted into a physical address as follows:
Physical address = logical segment selector · 16 + logical offset
In the example the following results for the physical address:
0x2F10 · 16 + 0x87A1 = 0x2F10 · 0x10 + 0x87A1 = 0x2F100 + 0x87A1 = 0x378A1
With this addressing, the physical address width can be expanded to 20 bits, since the 16-bit segment address becomes a 20-bit number when multiplied by 16, to which the offset is added. With these 20 bits, up to 1 MiB RAM can be addressed on a 16-bit processor. Strictly speaking, under certain circumstances, even 21-bit numbers can result from the addition during the address calculation, i.e. a little more than 1 MiB of memory can be addressed. For more detailed information on this, please refer to the articles High Memory Area and A20-Gate .
Intel's x86 processors in protected mode
The so-called protected mode was introduced from Intel's 80286 processor . Here segments can be between one byte and 64 KiB (from the 80386 up to 4 GiB) long and begin at any byte position in the linear address space. Each segment is described by a special data structure called a segment descriptor. In addition to the segment base address and segment length, a segment descriptor also contains information about segment attributes such as segment type, privilege level and read / write rights.
Segment descriptors are read from descriptor tables in the working memory. These tables are set up and managed by the operating system. The segment selector of a logical address specifies the descriptor table and the index of a segment descriptor within the table. The data required for address calculation are then read out from the selected segment descriptor.