Second breakthrough
As a second breakthrough ( English secondary breakdown ) is a special form of overload of a bipolar transistor due to high voltage ( reverse voltage -emitter collector path over), respectively.
Increase in reverse voltage through negative base voltage
Due to the design, each bipolar transistor has a certain, maximum permissible reverse voltage across the collector-emitter path when the control connection (base) is not connected. This value is commonly referred to with the parameter U CEO . If this value is exceeded by the applied voltage, the so-called “first breakdown” occurs, at which the component begins to conduct , similar to the behavior of a Zener diode . As long as the permissible temperature is not exceeded in this case, a first breakdown is harmless in most transistors.
However, if such a transistor is biased at its base in such a way that it is operated in reverse direction (negative for an NPN transistor and positive for the PNP counterpart), most types are able to block significantly higher voltages. The gain in reverse voltage can be approx. 50%. (Only bipolar transistors can be “tuned” in this way. MOSFETs, for example, do not offer this option.) The maximum possible reverse voltage for transistors operated in this way is specified in the data sheets with the parameter U CE, r or U CB0 .
The so-called “second breakdown” occurs only when a transistor that is blocked in this way is made to conduct in the event of a fault due to excessively high voltage. This breakthrough creates punctiform overheating on the chip surface and at least worsens the properties of the component.
Destruction of a bipolar transistor due to local overheating
There are also two destruction scenarios that occur due to thermal overheating of a bipolar transistor when it is conducting. While the overheating of the component can be avoided by dissipating the power loss by means of suitable cooling, there is the risk of a second breakdown if an actually permissible high power loss occurs with a high collector-emitter voltage.
The common explanation is that the current density and thus the power loss are distributed unevenly on the chip in this case, which is increased due to the positive temperature coefficient of the conductivity of the semiconductor material itself. At the points of high power dissipation, the junction temperature exceeds the permissible value and the chip is destroyed.
See also
Individual evidence
- ^ Area of Safe Operation (ASO). SANYO Semiconductor Co., Ltd, accessed December 15, 2012 .