FPGA mezzanine card
The FPGA Mezzanine Card ( FMC ) is a daughter card standard that is specially designed for the needs of FPGAs and is specified as ANSI / VITA 57.1 .
background
FPGAs offer a wide range of I / O options. Modern FPGAs support a variety of signal standards, from simple TTL digital I / O to memory buses and fast differential I / O with LVDS . Some families also offer Gigabit transceivers with which serial high-speed buses such as Gigabit Ethernet or PCI Express can be implemented.
If an FPGA is embedded in an application , this flexibility is usually lost, as the I / O options are now determined by the connected peripherals (connectors, PHYs , etc.). If the I / O is to be changed, the hardware must be revised.
The FPGA Mezzanine Card is supposed to offer a solution here: The I / Os of the FPGA are connected directly to a multi-pole high-speed connector and the entire I / O periphery is outsourced to the FMC. If the I / O is to be changed now, only the FMC has to be exchanged.
construction
| variant | Low pin count | High pin count |
|---|---|---|
| User I / O | 68 or 34 | 160 or 80 |
| I / O banks | 1 | 3 |
| Gigabit lanes | 1 | 10 |
| Clock signals | 2 | 4th |
An FMC is a circuit board measuring approximately 69 mm × 76.5 mm . Some indentations allow an FMC to be used on Advanced Mezzanine Cards . A front plate that is similar to that of a PMC is attached to the front . Modules that are twice as wide and modules with special connection surfaces for heat sinks ( conduction cooled ) are defined as variants .
The FMC has a high-speed connector that has 160 ( Low Pin Count , LPC) or 400 ( High Pin Count , HPC) pins. The LPC variant offers 68 freely assignable pins in one bank, the HPC variant offers 160 pins which are divided into three banks. Two pins can each be combined to form a differential pair. In addition, an LPC module offers an interface for gigabit transceivers , an HPC module offers ten of them.
The special supply voltage (VADJ) is intended to serve as the I / O supply voltage. The VADJ does not have a fixed value, the FMC is allowed to determine this. As a rule, the VADJ will depend on the signal standards used. The reference voltage required by some signal standards must be provided by the FMC. The FPGA mezzanine card offers IPMI support through an EEPROM with FRU information . There is also an entry indicating which VADJ the FMC needs.
As one of the major FPGA manufacturers, Xilinx contributed to the FMC standard. Xilinx is actively promoting the standard by equipping all new Eval boards with an FMC slot. Xilinx also offers some FMCs itself.
Web links
- FMC Marketing Alliance (English)
Individual evidence
- ↑ FMC form factors
- ↑ FMC signals and pinout
- ↑ FPGA Mezzanine Card (FMC) Standard ( Memento of the original from December 28, 2010 in the Internet Archive ) Info: The archive link was inserted automatically and not yet checked. Please check the original and archive link according to the instructions and then remove this notice.
