Expanded silicon

Strained silicon ( English silicon strained ) is a process in the semiconductor industry , in which by mechanical stresses , the carrier mobility of electrons and holes in the channel (silicon) of a metal-insulator-semiconductor field-effect transistor is influenced.

Structure and functionality

Stretched silicon consists of a silicon - germanium layer ( SiGe ) on which a thin silicon layer is applied. Due to the higher lattice constant of the SiGe layer compared to silicon, i. H. larger distances between the individual atoms, the crystal lattice of the silicon is pulled apart a little at the contact point of the SiGe and Si layers , so that the distances between the Si atoms also increase.

The larger atomic distance reduces the interaction between the atoms, which increases the charge carrier mobility and thus the electrical conductivity for electrons. This in turn leads to an up to 70% faster transit of the electrons through the silicon layer and thus allows a transistor constructed from it to switch up to 35% faster. This in turn offers the possibility of clocking a processor constructed with it faster.

This is used, among others, by Intel and AMD / Globalfoundries in their current (2009) processors.

Web links

• Christian Klaß: Strained Silicon - IBM technology makes chips faster . Golem, June 8, 2001, accessed September 7, 2010.
• Graphic with TEM cut ( Memento from September 27, 2007 in the Internet Archive ) from: Chris Crazipper Angelini: Intel Pentium 4 Prescott 3.2GHz & Pentium 4 Extreme Edition 3.4GHz Reviewed ( Memento from February 14, 2004 in the Internet Archive ) FiringSquad, 1 February 2004, accessed September 7, 2010.
• H. Föll: Modern microelectronics and mobility . In: Introduction to Materials Science II. Technical Faculty of Christian-Albrechts-Universität Kiel. Retrieved September 28, 2010.

Individual evidence

1. ↑ W. Chee, S. Maikop, CY Yu: Mobility-enhancement technologies . In: IEEE Circuits Devices Mag . tape 21 , no. 3 , 2005, p. 21-36 , doi : 10.1109 / MCD.2005.1438752 .
2. ↑ Chris Auth, Mark Buehler, Annalisa Cappellani, Chi-hing Choi, Gary Ding, Weimin Han, Subhash Joshi, Brian McIntyre, Matt Prince, Pushkar Ranade, Justin Sandford, Christopher Thomas: 45nm High-k + Metal Gate Strain-Enhanced Transistors . In: Intel® Technology Journal . tape 12 , no. 01 , 2008, ISSN  1535-864X , p. 77–85 , doi : 10.1109 / VLSIT.2008.4588589 ( PDF ( Memento of July 10, 2012 in the Internet Archive )). 45nm High-k + Metal Gate Strain-Enhanced Transistors ( Memento of the original from July 10, 2012 in the Internet Archive ) Info: The archive link was inserted automatically and has not yet been checked. Please check the original and archive link according to the instructions and then remove this notice.