Known Good Die

A known good die (abbreviation: KGD; English for, proven error-free chip '), referred to in the microelectronics an integrated circuit (specifically a The ), which already prior to its installation in a chip package has been qualified by test to be error-free.

In the usual manufacturing process, the chip is not tested until after it has been packaged in a housing, as this is easier to implement mechanically and electrically and thus the errors that occur during the packaging can also be recognized. With the vertical integration of several chips in a system-in-package housing , however, it became economically necessary to determine that the chip was free from defects before assembly. This is achieved by transferring test content that would otherwise take place in the final function test to the wafer test.

Known Good These have so far mainly been manufactured for use in system-in-package, since the costs are higher than the conventional procedure and the same error-free rates cannot be achieved. Nevertheless, the technology is being used more and more frequently to test chips before delivery, if the subsequent production step justifies the costs if there are defects , as in more complex chip-on-board structures.

literature

• William J. Greig: Integrated circuit packaging, assembly and interconnections . Springer, 2007, ISBN 978-0-387-28153-7 , pp. 81-93 (Chapter 6: Known Good Die (KGD)).