MBus (computer bus)

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Two MBus slots, one with a built-in HyperSPARC module
MBus connector
MBus module: Sun SuperSPARC II SM71

The MBus is a computer bus system that was used in SPARC systems from Sun Microsystems for CPU modules. It is considered the first (manufacturer-independent) standard for CPU modules. He established the connection between processors, cache memory and other computer components. The board dimensions corresponded to those of the SBus cards. The MBus worked with a synchronous cycle of max. 40 MHz (optionally 25 to 33 MHz). 64-bit data and addresses are transmitted in multiplex mode, 36-bit address space (64 GB) can be physically addressed. The data transfer rate is 80 MByte / s (320 MByte / s peak). The various processors on the MBus were controlled by an arbiter . There was still an interrupt , reset and timeout logic. A maximum of eight processors could work (quasi) in parallel on the MBus .

The Mbus was followed a little later by the XBus . This uses a packet-switched bus protocol with otherwise the same electrical and mechanical properties as the MBus. Sun and Cray used the XBus in supercomputers of the time, such as in 1996 in the SPARCserver 1000 or the Cray CS6400 (64 SuperSPARC CPUs on four XBusses). Another, similar development was the KBus the company Solbourne .

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