MOS Technology 7501

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MOS 8501

The MOS Technology 7501 is officially the CPU in the computers of the Commodore 264 series . In fact, most computers had a CPU with the imprint 8501 built into them, but it was simply manufactured in a different process. There are also different revisions of the chip, for example R1 or R4. The CPU is instruction compatible with the MOS 6502 . It is an 8-bit CPU with a 16-bit address bus for addressing 64 kbytes of memory. The address bus is equipped with tri-state outputs. It can be switched to a high resistance so that other components can occupy the address bus ( DMA ). For the 264 series, this is just the TED . The arithmetic unit is hard-wired and, depending on the command, requires 2 to 7 cycles for processing, whereby each step can be assigned specific internal operations. The CPU has 4 registers: the accumulator , or accumulator for short, (mainly for calculations) and the X and Y registers as index registers. The status register is used to display the various states of the CPU after calculation steps have been carried out or to force a certain type of calculation (decimal flag). The current memory position on the stack is displayed with the stack pointer, which is located in the memory in the range $ 0100 to $ 01ff and is hard-wired in the CPU.
The addresses from $ 0000 to $ 00ff (although $ 0000 and $ 0001 are blocked by the integrated port) can be used for many commands as register substitutes or for pointers and are called zeropage.
The CPU has an 8-bit I / O port, from which only 7 lines were led to the outside. This port is located in the memory at addresses $ 0000 and $ 0001. The port is used to control the datasette and the serial IEC bus. After a reset, the CPU reads the vector at address $ FFFC / $ FFFD (low / high byte) and starts processing the program at the address stored there. After an interrupt, the CPU reads the vector at address $ FFFE / $ FFFF and executes the interrupt service routine at the address stored there, provided that the interrupt was not blocked.

Technical specifications

  • Technology: HMOS
  • Clock frequency: 1 MHz
  • Clock cycles per command: 2 to 7
  • Address space: 64 kbytes
  • Address bus width: 16 bit (tri-state (DMA-capable), controllable with AEC signal)
  • Data bus width: 8 bits
  • Interrupts: IRQ, software interrupt with BRK command
  • Orders: 56
  • Register:
    • Accumulator, 8 bit
    • X register (index register), 8 bits
    • Y register (index register), 8 bits
    • Stack pointer, 8 bit, to address range $ 0100 to $ 01ff
    • Status register, 8 bit
    • Command counter, 16 bit
  • 8-bit I / O port (only 7 lines lead to the outside, P5 is missing.)

casing

The chip is packaged in a 40-pin DIL plastic housing.

experience

  • By default, the CPU is not cooled in the computers of the 264 series. However, it has been shown that early failures can be prevented by passive cooling with a suitable heat sink for DIL-40 chips. These still fit into the housing of the Commodore Plus4 , while the Commodore 116 has to do without the upper shield plate. Since there is no cooling for the TED, a heat sink must also be glued to it. The Commodore 16 has enough space for a heat sink anyway.
  • Another source of premature failures with the plus / 4 is apparently the switching on and off of the device via a socket strip, whereby the switching on of the power supply unit must be assumed to be the cause. In order to avoid these failures, the plus / 4 should definitely be switched on after the socket strip via its own switch and switched off before the socket strip via its own switch.