Tri-state

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Symbol according to IEC standard

As Tri-State are digital circuit elements called the outputs rather than the usual two (0 and 1) but can accept additionally a third state, the "Z" or with " high impedance " ( high impedance is called).

By tri-states , it is possible, the outputs of several components interconnect, without causing short-circuiting , an overlay or a Wired-AND - or wired-OR comes linkage, z. B. with data buses . Compared with the wired-and and wired-or connections, the tri-state technology is significantly faster, since the tri-state technology has its own switching transistor to switch the output to the low level and to the high level owns.

Tri-state buffer with A  input, C  output and B the enable input. On the right is the equivalent switch

High resistance state (Z)

The high-resistance state (Z) is output by a component when it has no active input. In the case of digital circuits, this means that the output signal is neither logic 0 nor 1, but rather high-resistance. Such a signal ensures that the component behaves as if its output were temporarily disconnected from the circuit; so it does not affect the outputs of other components connected in parallel with it. Rather, it assumes the same output voltage as the currently active components.

Truth table

Unusual tri-state symbol according to DIN

The following illustration of a tri-state structure (functional principle of tri-state with break contact) shows a switch in the form of a break contact. This corresponds to c=0a closed switch in the inoperative state ( ). In  athis case, the input signal present at the input is y forwarded directly to the output  . If there is aa 0signal at the input  , there is ya 0signal at the output  . The same applies to a 1signal. This case corresponds to the first two lines of the function table.

Let us consider the second switch position of the switch  c. In this case there is ca 1signal at the switching input  . This switch position represents an opener in activated form. In practice, this means that the switch is activated and there is no electrical connection between the input  aand the output  y(corresponds to the activated state of an opener). In terms of circuitry, this corresponds to the tri-state condition. In the high-resistance state, the output has no fixed level (= high-resistance state, indefinite, abbreviated to Z). In the function table (see below) this case corresponds to the third and fourth lines. Regardless of the input  astatus, the high-impedance output is present  Z.

In the abbreviated function table , the tri-state behavior can be reduced to two lines. In the first case (first line), the logic state at ythe input  is present at the output  a. In the second case, when the gate is in the " tri-state " ystate, the high-resistance state is present at the output  Zregardless of the input  state  a. This behavior is referred to as the low- active control of the tri-state circuit.

Table complete
a c y
0 0 0
1 0 1
0 1 Z
1 1 Z
Table shortened
c y
0 a
1 Z
Functional principle of tri-state with NC contact

Technical use of tri-state technology

TTL inverter with tri-state output

The number of tri-state components connected in parallel is limited. Each tri-state output has low leakage currents that are in the parallel connection of the Tri-State add -Bauelemente and thus can distort the signal level.

It must also be taken into account that the outputs of the tri-state components must all be connected to one another. These connecting lines have parasitic capacitors that have to be reloaded with each switching process from high to low and from low to high . The connecting lines also have an ohmic resistance . The greater the number of components connected in parallel, the greater the capacitance value. This also increases the resistance value and consequently the influence on the signal. For example, this reduces the edge steepness of the output signal during the switching processes. As a result, the maximum achievable clock frequency decreases with the number of components connected in parallel.

Since inputs of logic modules are usually also connected to tri-state outputs, a defined logic state must be present. This means that a component must always send an active low or high signal - at least one output must not be in the tri-state state. As an alternative, a pull-up resistor (between the output and the supply voltage ) or a pull-down resistor (between the output and ground) can be used. This then ensures a defined signal level when no tri-state driver is active.

With programmable logic circuits (PLD) or FPGA components, the tri-state technology can also be used, but here only at the component connections to the outside. Within the components, only multiplexers are used for switching . The same applies to application-specific integrated circuits (ASICs).

Web links

Individual evidence

  1. Practical implementation of logical circuits ( memento of the original from October 11, 2007 in the Internet Archive ) Info: The archive link was automatically inserted and not yet checked. Please check the original and archive link according to the instructions and then remove this notice. , Computer center for electrical engineering at Kiel University of Applied Sciences , October 9, 2012 @1@ 2Template: Webachiv / IABot / www.rz.e-technik.fh-kiel.de