# multiplexer

Animation of the operating principle of a multiplexer and demultiplexer

A multiplexer ( MUX or Mux for short ) is a selection circuit in analog and digital electronics , with which one can be selected from a number of input signals and switched through to the output. Multiplexers are comparable to rotary switches that are not set by hand but with electronic signals. The difference to the relay is that the connections are not made mechanically but (nowadays) by means of integrated semiconductor circuits.

In the case of cyclical processing, a multiplexer can be used to convert parallel data streams into serial ones. In addition, a switching function or any possible switching state can be implemented with a multiplexer . Optical multiplexers and demultiplexers that work with optical switches or, in the case of wavelength division multiplexing, with wavelength-selective elements are available for signal transmission with optical fibers . The counterpart to the multiplexer is the demultiplexer , with which the combined data channels are separated again. Analog multiplexers work bidirectionally , which means that they can also be used as demultiplexers.

In addition to several inputs and one output, a multiplexer has one or more control signals that determine which input is selected. That input is switched through to the output which has the identifier that is present as a control signal in the form of a binary number . A multiplexer controlled in parallel with the designation code n-MUX has, for example, n control signals, 2 n inputs and one output. The inputs are usually numbered with the numbers 0 to 2 n -1.

## Designations

Block diagram of a satellite transponder

In satellite technology , MUX refers to a multiplexer or demultiplexer. IMUX ( input multiplexer ) at the input behind a receiving antenna is technically a demultiplexer, correspondingly an OMUX at the output in front of the transmitting antenna is a multiplexer. In the case of video formats , a multiplexer (muxer) is used to merge video tracks, audio tracks, menu structures and subtitles into one data stream.

In communications technology , a multiplexer is a device that combines data and / or voice channels and transmits them on a shared line. Since the data is both sent and received, a demultiplexer is usually also required ( PCM30 ). The signals to be multiplexed can themselves be analog or digital, but control is always carried out by digital signals that function as additional inputs.

## Multiplexer for digital signals, logic gates

### Single multiplexer

The simplest case is the 2-input multiplexer (also single multiplexer for short "1-MUX"; see Figure 1), which has a control signal s 0 , 2 inputs e 0 and e 1 and an output a. If a 1 is applied to the control signal s 0 , the output a supplies the signal which is applied to the input e 1 , otherwise that of the input e 0 .

1-MUX truth table
s 0 e 0 e 1 a
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
Simplified truth table of the 1-MUX
s 0 a
0 e 0
1 e 1
Fig. 1a: Structure of a 1-MUX using a NOT , two AND and an OR gate
Fig. 1b: Symbol of a 1-MUX according to DIN 40900; the labeling defines the internal structure (G = AND; V = OR; 1 = identity; 1 = negation)

Instead of the designation MUX, the more general designation X / Y is usually used in data sheets for a code converter . In the following, however, the designation MUX is retained, as this is clearer.

### Dual and m multiplexers

Figure 2a shows the recursive structure of a double multiplexer (“2-MUX” for short) from 1-MUXs. Similarly, MUXes can be built with even more control signals and correspondingly more inputs. The construction of an m-MUX requires 2 m -1 MUXe with m control signals each. The number of inputs and the costs of a multiplexer therefore increase exponentially with the number of its control signals.

Multiplexers with many control signals have a large number of gate stages, which leads to a long run time .

Truth table of the 2-MUX in Fig. 2a
s 0 s 1 a
0 0 e 0
0 1 e 1
1 0 e 2
1 1 e 3
Fig. 2a: Structure of a 2-MUX from three 1-MUX
Fig. 2b: Circuit symbol of a 2-MUX consisting of three 1-MUX according to DIN 40900; Labeling describes the internal structure; with functional head

The switching function of this 2-MUX is: ${\ displaystyle a = {\ begin {pmatrix} e_ {0} \ wedge {\ bar {s}} _ {0} \ wedge {\ bar {s}} _ {1} \ end {pmatrix}} \ vee { \ begin {pmatrix} e_ {2} \ wedge {\ bar {s}} _ {0} \ wedge s_ {1} \ end {pmatrix}} \ vee {\ begin {pmatrix} e_ {1} \ wedge s_ { 0} \ wedge {\ bar {s}} _ {1} \ end {pmatrix}} \ vee {\ begin {pmatrix} e_ {3} \ wedge s_ {0} \ wedge s_ {1} \ end {pmatrix} }}$

Truth table of the 2-MUX in Fig. 2c
s 0 s 1 a
0 0 e 0
0 1 e 1
1 0 e 2
1 1 e 3
Fig. 2c: Structure of a 2-MUX from AND and OR gates
Fig. 2d: Circuit symbol of a 2-MUX according to DIN 40900
Fig. 2e: Circuit symbol with simplified dependency notation

The switching function of this 2-MUX is: ${\ displaystyle a = {\ begin {pmatrix} e_ {0} \ wedge {\ bar {s}} _ {0} \ wedge {\ bar {s}} _ {1} \ end {pmatrix}} \ vee { \ begin {pmatrix} e_ {1} \ wedge {\ bar {s}} _ {0} \ wedge s_ {1} \ end {pmatrix}} \ vee {\ begin {pmatrix} e_ {2} \ wedge s_ { 0} \ wedge {\ bar {s}} _ {1} \ end {pmatrix}} \ vee {\ begin {pmatrix} e_ {3} \ wedge s_ {0} \ wedge s_ {1} \ end {pmatrix} }}$

### example

A switching function f (s 3 , s 2 , s 1 , s 0 ) is given, which is 1 if and only if the binary number [s 3 s 2 s 1 s 0 ] 2 is a prime number . For example, f (0, 0, 1, 1) = 1, since the binary number 0011 corresponds to the decimal 3 and 3 is a prime number (since 1 is not a prime number, the logic for 0 0 0 1 at output a followed by a 0).

The function f corresponds to the following truth table :

Dec s 3 s 2 s 1 s 0 a
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 1
3 0 0 1 1 1
4th 0 1 0 0 0
5 0 1 0 1 1
6th 0 1 1 0 0
7th 0 1 1 1 1
8th 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 0
11 1 0 1 1 1
12 1 1 0 0 0
13 1 1 0 1 1
14th 1 1 1 0 0
15th 1 1 1 1 0

This switching function should be implemented with a 4-MUX. The bits present at the inputs of the 4-MUX can be read from the results column a of the truth table. The 4-MUX must therefore be switched as follows:

 Fig.4a: Realization of the function f with a 4-MUX (principle) Fig. 4b: practical implementation

But it is also possible to implement the same function with a 3-MUX. The problem is that the function f has four parameters , but only three control signals are available. It is solved by expressing the function value a as a function of s 3 .

This creates the following truth table:

s 2 s 1 s 0 a
0 0 0 0
0 0 1 0
0 1 0 S 3
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 S 3

The 3-MUX is connected as follows:

 Fig. 5a: Realization of the function f with a 3-MUX (principle)
 Fig.5b: Practical setup with triple multiplexer consisting of single multiplexers (variant 1) Fig.5c: Practical setup with triple multiplexer consisting of single multiplexers (variant 2) Fig. 5d: practical setup with triple multiplexer

### Outputs

In CMOS technology, multiplexers are designed with both digital logic gates and analog switches ( transmission gates ). This type of construction is also called an analog multiplexer / demultiplexer .

When using transmission gates, the selected logic level is not copied to the output, but a direct conductive connection between the signal input and output is actually created. This has the advantage that the multiplexer can also pass analog signals through. In addition, the direction of signal flow is not specified, the multiplexer always acts as a demultiplexer at the same time. Thirdly, there is no transmission delay of the signal, as would be inevitable when passing through a logic path. It must be seen as a disadvantage that the signal is not amplified by the circuit as is usually the case with logic modules, but is even weakened by the series resistance of the analog switch (usually approx. 50 ohms).

 Functional principle of a multiplexer using a 1-out-of-4 demultiplexer

The OR link at the output can also be implemented using a wired OR link . If you want to prevent the long rise times at the output, you can also connect tri-state gates to the output. However, this solution is not used in integrated circuits, with the exception of bus systems in which the signal sources are spatially separated.

 Outputs with tristate and wired-OR Outputs with open collector and negated wired AND (corresponds to wired OR)

### Multiplexer blocks

Multiplexers are commercially available as prefabricated IC modules. The most important types are summarized in the following table:

Common integrated multiplexers
Number of
inputs
TTL ECL CMOS
digital analog 1)
16 74LS150   4515 4067
2 × 8       4097
8th 74LS151 10164 4512 4051
2 × 4 74LS153 10174 4539 4052
8 × 2 74LS604
4 × 2 74LS157 10159 4519 4066
1) Multiplexer / demultiplexer with transmission gate