Metal-insulator-semiconductor structure

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MIS structure (metal / SiO 2 / p-Si) in a vertical MIS capacitor

The metal-insulator- semiconductor structure (engl. Metal insulator semiconductor , short MIS ) forms the basis for a multiplicity of components in microelectronics, for example. B. field effect transistors , CCD sensors , which in turn result in extended applications, z. B. Microprocessors .

The structure consists of a carrier (mostly pure silicon ) and a metal layer on top. These two layers are separated by a thin layer of insulator. A capacitor forms. At present (2008) mainly silicon dioxide , less often silicon nitride , are used as insulators . Since an oxide (silicon dioxide, SiO 2 ) is used as an insulator, one also speaks of MOS structures. Typical application examples are the MIS capacitor and the MOS field effect transistor .

Working conditions

The MIS structure is an essential part of an MIS transistor, the metal connection corresponding to the gate electrode in the MIS transistor and the semiconductor corresponding to the substrate . The gate voltage is the potential difference dropping from the gate to the substrate connection. In addition, the insulator contains mostly positive charge carriers that are largely independent of the external voltage and that must be taken into account when dimensioning components.

Depending on the applied voltage, a distinction is made between the following states (all data apply to a p- doped substrate):

Thermodynamic equilibrium
If there is no gate voltage ( ), charges generally already exist inside the structure. Similar to a Schottky diode , the different Fermi levels are balanced in thermal equilibrium , which leads to a voltage difference known as the contact potential . Since the Fermi level of the metal is generally higher than that of the semiconductor, positive charges form at the interface between metal and insulator and negative charges form at the interface between insulator and semiconductor. Since the charge carrier density of the semiconductor in relation to the metal is relatively low, a space charge zone is formed. The voltage drop across the MIS structure is divided linearly over the oxide and quadratically over the space charge zone.
Ribbon case
If the contact potential and the voltage drop across the oxide are balanced by a certain weak bias voltage, the space charge zone disappears and one speaks of the flat band drop and the applied flat band voltage . The name comes from the fact that no curvature can be seen in the ribbon model . The sign and the size of the voltage required for the flat band case depends on the gate material and also on the semiconductor used.
enrichment
With a large negative bias ( ), majority charge carriers accumulate on the semiconductor surface (semiconductor-insulator interface). This state is called enrichment (accumulation).
Impoverishment
An increase in the applied voltage above the flat band voltage ( ) leads to a reduction of the majority charge carriers in the semiconductor-insulator interface, this state is referred to as depletion ( depletion ). The vertically formed space charge zone in the silicon is thereby enlarged.
inversion
As soon as the minority density exceeds the majority density at the semiconductor-insulator interface due to the applied voltage, one speaks of inversion . A distinction is made between weak inversion and strong inversion . In the case of strong inversion, an electron channel is created in the semiconductor at the boundary to the insulator, in which n-conduction is possible. This effect is used in the MIS transistor. The charge of the electrons in the electron channel reduces the vertically formed space zones compared to the case of depletion.

literature

  • Ekbert Hering, Klaus Bressler, Jürgen Gutekunst: Electronics for engineers and natural scientists. Springer-Verlag 2014, ISBN 3-642-05499-4 , p. 132.

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