Motorola 68HC11

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68HC11 in DIP housing
68HC11 in PLCC housing

The Motorola 68HC11 is an 8-bit - microcontroller of the family of Motorola 6800 . It was introduced in 1984, HC stands for HCMOS , as with its predecessors 68HC05 and 68HC08 .

The processor architecture is a CISC architecture with an 8-bit data bus and 16-bit address bus and a 64 KB large address space . The 68HC11 also has a 2 × 8-bit or 1 × 16-bit accumulator and a 2 × 16-bit index register. The 68HC11 supports memory mapped IO, a 16/16 bit division and an 8 × 8 bit multiplication. The maximum clock frequency is 3 or 4 MHz depending on the model.

Operating modes

  • Single-Chip Mode: Ports B and C are used for general, parallel I / O operations; external memory is not addressable.
  • Expanded Multiplexed Mode
  • Special Test Mode: is used for the internal production test, in this mode it is possible to access the programming of the configuration registers. This mode also supports emulation and debugging during development
  • Bootstrap mode

Members of the 68HC11 family

  • A series also contains 8 KB of read-only memory , 256 bytes of RAM , 512 bytes of EEPROM and an 8 × 8-bit DA converter
  • D series
  • E series HC811E2 2048 byte internal EEprom, HC711E9 12K, HC711E20 20K and HC711E32 32K EPROM or OTPROM
  • F series
  • G series
  • K series

literature

Individual evidence

  1. Motorola Annual Report 1984