Shrink
With shrinking (of English. Shrink : shrink, disappear, even die-shrink) is known in the electronic scaling (here: Zoom) of a chip model modeling by refined conductor structures.
If the structure width of a chip is reduced from 90 nm to 65 nm, for example, then less operating voltage is required to operate the chip at the same processing speed. This also reduces the power loss, which enables higher working frequencies with the same chip cooling. Another main focus when downsizing the structures is increasing the number of dies per wafer in order to reduce production costs. Alternatively, more transistors can be accommodated on dies of the same size after a shrink, with which more cores or larger caches can be implemented.
In practice, a shrink is usually like a completely new design, since the components of a complex IC, such as a processor, cannot simply be reduced in percentage terms.
Individual evidence
- ^ Dorin O. Neacșu: Telecom Power Systems . CRC Press, ISBN 978-1-138-09930-2 , pp. 43 (English).
- ^ Peter Shepherd: Integrated Circuits . Macmillan International Higher Education, 1996, pp. 176 (English).
- ↑ a b Bruce W. Smith, Kazuaki Suzuki: Microlithography: Science and Technology . CRC Press, 2020, p. 297 (English).
- ↑ Stephan Henzler: Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies . Springer Science & Business Media, 2006, p. 5 (English).