Transactional Synchronization Extensions

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The Transactional Synchronization Extensions - New Instructions ( TSX − NI or mostly just TSX ) are extensions of the x86 architecture to include transactional memory , with which the execution of parallel software can be accelerated.

distribution

TSX was officially presented in February 2012 and first shipped in selected processors of the Haswell architecture in June 2013. With Broadwell and Skylake, TSX also found its way into desktop processors. Due to a bug in the microcode, TSX was subsequently deactivated in numerous models of the Haswell and Broadwell architecture via UEFI update. The version from the Skylake architecture , on the other hand, was also used in the Kaby Lake architecture without change and has since been available in high-quality Intel Core models.

function

TSX provides two interfaces to generate code for parallel processing. First, there is Hardware Lock Elision ( HLE ), an interface to processors that do not have TSX. With Restricted Transactional Memory ( RTM ) a new instruction set extension is introduced to generate more efficient code.

Regions are defined in the main memory in which, on the one hand, calculations are carried out and results are stored, and in which, on the other hand, results from other calculations are written on a case-by-case basis. If a result of an external calculation is actually stored in such a defined region, the results previously determined therefrom are discarded and the calculations are carried out again. All such calculations are therefore initially speculative ( speculative execution ) and only bring a valid result over time.

With TSX, if the software has been revised to this effect, code is really executed in parallel, with the resulting dependencies being determined automatically and any dependencies found being recalculated. Until now, software had to be divided into processes or threads in order to be able to run in parallel. Dependencies had to be taken into account during programming. Now the related code areas are marked. TSX does the rest automatically when multiple code areas interact.

Benchmarks showed that multi-threading-capable applications with TSX can be executed around 40% faster, but data-intensive applications can be executed several times faster.

support

Under Linux, TSX is facilitated on the software side with the help of TSX Tools, which is a collection of tools and libraries.

Trivia

The comparable extension at AMD is called the Advanced Synchronization Facility . However, AMD has not yet launched a CPU that delivers this feature.

Individual evidence

  1. ↑ Richard M. Yoo, Christopher J. Hughes, Konrad Lai, Ravi Rajwar: Performance Evaluation of Intel Transactional Synchronization Extensions for High-Performance Computing (PDF) November 2013. Accessed November 14, 2019.
  2. ↑ Tomas Karnagel, Roman Dementiev, Ravi Rajwar, Konrad Lai, Thomas Legler, Benjamin Schlegel, Wolfgang Lehner: Improving In-Memory Database Index Performance with Intel Transactional Synchronization Extensions (PDF) February 2014. Accessed December 23, 2016.
  3. ↑ TSX Tools on github.com, accessed December 25, 2016