Side buffer (decision)

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Logo on the decisions of the Federal Court of Justice
Federal Court of Justice
File number X ZB 13/88
JurPC 1991, 1260
Paragraphs Section 1  Paragraph (1) PatG (1968)
Section 105 Paragraph (2) PatG
Section 76 Paragraph (2) PatG
Keywords Technicity
operating system
software patent
cited BGH decisions Dispositionsprogramm
rotary rakes
Red Dove
Straken
test methods
antilock braking system
rolled bar division
airfare minimizing
test methods
fault location
Federal Patent Court
File number 17 W (pat) 67/85
Paragraphs Section 1  Paragraph (1) Patent
Act Section 76 Subsection (2) Patent Act
DPMA
File number DE 25 42 845.9-53
Paragraphs Section 1  (1) PatG,
Section 59  (1) PatG
Filing date 25.9.1975

The decision Seitenbuffer X ZB 13/88 of the Federal Court of Justice (BGH) of June 11, 1991 was an important milestone in the history of German software patenting . The decision explains that a method that affects the functionality of a data processing system as such, because it contains instructions to use the elements of a data processing system directly in a certain way during operation , is a teaching on technical action and thus confirms the technical nature of operating system programs as an implicit requirement for patentability under the Patent Act of 1968.

facts

The decision of the Supreme Court was an application basis, which describes a process in which the memory system of several processes processed data processing system is used in a certain way. The main memory consists of two levels, a main memory containing all data and a page buffer containing only a selection . The memory area of ​​the current process is transferred from the slower main memory to the faster working page buffer and registered in a memory control unit. If the process changes, the memory area is transferred back to main memory and the memory area in the page buffer is released, but the information about the memory area is retained. When this process is activated again, it is possible to compare the extent to which the memory pages whose addresses are still stored have been changed. This means that only those memory pages need to be transferred from the main memory to the page memory that have also been changed by another process. These are then also transmitted as a bundle of memory pages. This loading strategy avoids dead times in the system that arise when the main memory is queried, as was the case with previous loading processes, since these only transfer a memory page individually if it is missing during a page request during the process.

The German Patent Office announced the patent application on March 13, 1980 after the examination board had issued a decision to publish it. The following documents were cited as prior art:

DE 21 49 200 A1 describes a hierarchically structured, multi-level virtual memory arrangement of a data processing system that simultaneously processes several processes. This arrangement has a main memory, a buffer memory and tables for translating virtual into real addresses.
The problem to be solved there is that in a virtual memory arrangement the central unit supplies virtual addresses while the channel programs are actually addressed, so that it must be determined whether data is stored in the buffer memory for the real address corresponding to the respectively offered virtual address are. There is therefore an addressing problem there.
DE 22 27 882 A1 relates to a device for selecting the data most frequently required in the course of program processing and for writing this data into a high-speed memory (corresponding to a page buffer) within a data processing system. With this device, the aim is to ensure that, in the course of program processing, data can be written from a main memory (called a large memory there) into a page buffer (called a high-speed memory there) so that a large part of the most frequently required data accumulates in the high-speed memory . To achieve this goal, the use of a random generator is provided, with the aid of which a current memory area is transferred from the large memory to the high-speed memory.

Opposition was filed on June 13, 1980 against the published patent application.

The patent was refused on May 24, 1985 by the patent department because the teaching of the patent claim was not technical and therefore not accessible to patent protection.

The Federal Patent Court denied (in teleological reduction ) the patentability if a technically unchanged data processing system is to be operated with a new operating program, because the claimed teaching is aimed at the selection, structuring and allocation of information and consists of a conceptual-logical instruction in the form of a Organizational rule that is by its nature non-technical.

The BGH stated that the justification given by the Federal Patent Court that the claimed teaching was aimed at the selection, structure and assignment of information and was exhausted in a conceptual-logical instruction in the form of an organizational rule that was by its nature non-technical , the denial of the patent not wearing. With reference to "Straken", the Senate explained that the formulations chosen by it are aimed solely at keeping the path open to patenting a new, inventive use of a data processing system known in its elements and structure, if such a system can be derived from the specification of the computer program should be derived. The Senate referred the application back to the Federal Patent Court.

The patent was granted on December 17, 1992 by the Federal Patent Court as "new, technically advanced and inventive". The dependent claims 2-6 were also granted as "advantageous, not self-evident developments of claim 1".

The patent expired in 1993 due to non-payment of the renewal fee.

Interpretation of claims BGH

The subject of the claimed teaching is accordingly a method for operating a main memory system of a data processing system, which processes several processes simultaneously,

  1. wherein the main memory system is designed as follows:
    1. it is multilevel and hierarchically structured,
    2. its two lowest storage levels exist
      1. from a main memory containing all the data of the simultaneously running processes and
      2. a page buffer comprising only a selection of memory pages,
    3. the page buffer
      1. is subject to preferred access and controlled by a memory controller
      2. a memory page missing during a memory access is transferred to it,
  2. with the following process steps:
    1. When a process is running, every request for memory access to the page buffer is registered in the memory control unit,
      1. the registration is done by temporarily storing the address of the selected memory page,
      2. this determines the current memory area of ​​the process,
    2. When changing the process, the cached page addresses are transferred to the main memory,
    3. when the process is activated again later by a processor of the data processing system
      1. first read the information about the current memory area (this process) from the main memory,
      2. the assigned memory pages in the main memory are sequentially selected with the stored page addresses and
      3. transferred to the page buffer, provided they were displaced from this when other processes were being processed,
    4. After the current memory area of ​​the process to be activated has been made available, this process runs in the page buffer unhindered by page change requests as long as the area does not change,
    5. Changes in the current memory area caused by the request for memory pages that were not previously required are registered in the memory control unit.

Applicable § 1 PatG of January 2, 1968

(1) Patente werden erteilt für neue Erfindungen,
    die eine gewerbliche Verwertung gestatten.
(2) Ausgenommen sind Erfindungen,
    deren Verwertung den Gesetzen oder guten Sitten zuwiderlaufen würde,
    soweit es sich nicht um Gesetze handelt, die
      nur das Feilhalten oder Inverkehrbringen des Gegenstands der Erfindung
      oder, wenn Gegenstand der Erfindung ein Verfahren ist,
      des durch das Verfahren unmittelbar hergestellten Erzeugnisses beschränken.

meaning

An exclusion from patentability of programs for data processing systems, as provided for in the EPC of 1973, had not yet been ratified by the legislature at the time of filing. Art. IV IntPatÜG , which adapted § 1 PatG to Art 52  EPC , was only passed by the German Bundestag on June 21, 1976 and the amendments to § 1 PatG came into force on August 1, 1980.

Section 2  UrhG of September 9, 1965 did not list any programs for data processing systems as protected works , only representations of a scientific or technical nature. Programs for data processing were only counted among the works protected by copyright on June 24, 1985. The EU Directive on the legal protection of computer programs, RL 91/250 / EEC , amended by EU-RL 93/98 / EEC and EU-RL 2001/29 / EC was issued on May 14, 1991, shortly before the BGH decision . Only since June 9, 1993 - after the patent was granted by the Federal Patent Court - have all computer programs been countedamong the works protected by copyright.

At the time of registration of the page buffer registration, there was a legal loophole (now closed) for computer programs with regard to the content and limitations of the guarantee of property under Article 14 of the Basic Law. The almost simultaneous decision of the BGH Operating System chose a different interpretation of the now amended Section 1 PatG with regard to the technical character of operating system functions and, like the 17th Senate of the BPatG, subordinated these to data processing.

Protection area

The user of the procedure granted in claim 1 addressed via Section 9 sentence 2 no. 2 PatG is any operator of the data processing system with a multitasking operating system.
The granted claims 4-6 put circuit arrangements for performing the method under protection. As explained in the first BPatG decision and confirmed by the BGH without hesitation, the application describes “no specific structure of a data processing system in the sense of an objective design”. Claims 4-6 accordingly forbade any third party to introduce or possess such a circuit arrangement for the purposes mentioned, according to Section 9 sentence 2 No. 1 PatG .
The patent protection has expired.

See also

Individual evidence

  1. ^ Dennis Ritchie , Ken Thompson : The UNIX Time-Sharing System . In: CACM , 7/1974, Vol. 17, No. 7, pp. 365-375 , doi: 10.1145 / 361011.361061 , Section 5. Processes and Images , which was published one year before the registration.
  2. softwarepatentschutz.de
  3. a b c from BPatG 17 W (pat) 67/85 of December 17, 1992
  4. Art. 52 EPC 1973 ( Memento of the original dated December 26, 2008 in the Internet Archive ) Info: The archive link was inserted automatically and has not yet been checked. Please check the original and archive link according to the instructions and then remove this notice. @1@ 2Template: Webachiv / IABot / www.epo.org
  5. cf. BGH pipe welding process in which only the appropriate use of the device is protected.