Y diagram
The Y diagram (also known as the Gajski diagram ) clearly describes the perspectives in hardware design, especially when developing integrated circuits . In 1983 Daniel D. Gajski and Robert Kuhn developed the design model. In 1985 it was refined by Robert Walker and Donald Thomas.
According to this model, hardware is designed in three different domains . The domains are shown as axes and form a Y. Levels of abstraction are spanned along the axes and characterize the degree of abstraction in the description. Outer layers are generalizations. Inner layers are refinements.
Hardware design is mostly a top-down design in which behavior, structure and geometry are described down to lower levels of abstraction. The developer can choose one of the perspectives based on the model of the Y diagram and jump back and forth between the perspectives. In general, the design process is not locked into any particular order on the y-diagram.
- The basic properties of an electronic system are defined at the system level . Block diagrams are used to describe the behavior . Signals and time behavior are abstracted. Blocks in the structure domain are, for example, CPUs and memories .
- The algorithmic level is determined by descriptions of concurrent algorithms (signals, loops, variables, assignments). In the structure domain, for example, memory cells and ALUs are essential elements.
- The register transfer level is an abstraction level on which the behavior is described by communicating registers and logic units. Data structures and data flows are defined. In the geometrical view, the design step of the floor planning is located on this hierarchical level.
- The logic level is described in the behavior view by Boolean equations . In the structural view, this corresponds to the consideration of gates and flip-flops. In the geometry domain, the logic level is e.g. B. described by standard cells.
- The behavior at the circuit level is mathematically z. B. described by differential equations. Corresponding in the structural domain are transistors and capacitors up to crystal lattices . In the geometrical view, masks and layouts form the circuit level.