Zilog Z280: Difference between revisions
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declining merge. This chip is more different from the Z80 than many other upcs that have their own articles, like the 65C02. |
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{{Short description|16-bit microprocessor by Zilog}} |
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[[File:Z280 PLCC 1987.png|thumb|right|251px|The Z280 in a [[Plastic leaded chip carrier|PLCC68]] package]] |
[[File:Z280 PLCC 1987.png|thumb|right|251px|The Z280 in a [[Plastic leaded chip carrier|PLCC68]] package]] |
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[[File:STEbus Z280 CPU on 100x160mm Eurocard.png|thumb|STEbus Z280 processor]] |
[[File:STEbus Z280 CPU on 100x160mm Eurocard.png|thumb|STEbus Z280 processor]] |
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The '''Zilog Z280''' is a [[16-bit]] [[microprocessor]], an enhancement of the [[Zilog Z80]] architecture, introduced in July 1987. It is basically the [[Zilog Z800|Z800]], renamed, with slight improvements such as being fabricated in [[CMOS]].<ref>EDN November 27, 1986 p133</ref> It was a commercial failure. Zilog added a [[memory management unit]] (MMU) to expand the [[Address space|addressing range]] to 16 [[Megabyte|MB]], features for [[Computer multitasking|multitasking]] and [[multiprocessor]] and [[coprocessor]] configurations, and 256 bytes of on-chip static RAM, configurable as either a [[CPU cache|cache]] for instructions and/or data, or as part of the ordinary address space. It has a huge number of new [[instruction (computer science)|instruction]]s and [[addressing mode]]s giving a total of over 2000 combinations. It is capable of efficiently handling 32-bit data operations including hardware multiply, divide, and sign extension. It offers Supervisor and User operating modes, and optionally separate address spaces for instructions and data in both modes (four total possible address spaces). Its internal [[clock signal]] can be configured to run at 1, 2 or 4 times the external clock's speed (e.g. a 12[[MHz]] [[CPU]] with a 3 MHz [[computer bus|bus]]). Unlike the Z80 the Z280 uses a multiplexed arrangement for its address and data busses. More successful extensions of the [[Z80]]-architecture include the Hitachi [[HD64180]] in 1986 and [[Zilog eZ80]] in 2001, among others. See further [[Zilog Z800]]. |
The '''Zilog Z280''' is a [[16-bit]] [[microprocessor]], an enhancement of the [[Zilog Z80]] architecture, introduced in July 1987. It is basically the [[Zilog Z800|Z800]], renamed, with slight improvements such as being fabricated in [[CMOS]].<ref>EDN November 27, 1986 p133</ref> It was a commercial failure. Zilog added a [[memory management unit]] (MMU) to expand the [[Address space|addressing range]] to 16 [[Megabyte|MB]], features for [[Computer multitasking|multitasking]] and [[multiprocessor]] and [[coprocessor]] configurations, and 256 bytes of on-chip static RAM, configurable as either a [[CPU cache|cache]] for instructions and/or data, or as part of the ordinary address space. It has a huge number of new [[instruction (computer science)|instruction]]s and [[addressing mode]]s giving a total of over 2000 combinations. It is capable of efficiently handling 32-bit data operations including hardware multiply, divide, and sign extension. It offers Supervisor and User operating modes, and optionally separate address spaces for instructions and data in both modes (four total possible address spaces). Its internal [[clock signal]] can be configured to run at 1, 2 or 4 times the external clock's speed (e.g. a 12[[MHz]] [[CPU]] with a 3 MHz [[computer bus|bus]]). Unlike the Z80 the Z280 uses a multiplexed arrangement for its address and data busses. More successful extensions of the [[Z80]]-architecture include the Hitachi [[HD64180]] in 1986 and [[Zilog eZ80]] in 2001, among others. See further [[Zilog Z800]]. |
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The Z280 had many advanced features for its time, most of them never seen again on a Zilog processor: |
The Z280 had many advanced features for its time, most of them never seen again on a Zilog processor:<ref>{{cite book |
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| archive-url = https://web.archive.org/web/20190911051642/http://www.classiccmp.org/hp/zilog/z280_manual.pdf |
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* On-chip instruction and/or data [[CPU cache|cache]], or on-chip RAM |
* On-chip instruction and/or data [[CPU cache|cache]], or on-chip RAM |
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* Built-in MMU with [[memory protection]] |
* Built-in MMU with [[memory protection]] |
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* Ability to determine which register set is in context with instructions JAF and JAR |
* Ability to determine which register set is in context with instructions JAF and JAR |
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* |
* Three on-chip 16-bit counter/timers |
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* Four on-chip [[Dynamic memory allocation|DMA]] channels |
* Four on-chip [[Dynamic memory allocation|DMA]] channels |
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* On-chip full duplex UART |
* On-chip full duplex UART |
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* Multiple I/O pages, which also allows for internal I/O devices without restricting the address range of the I/O ports like on [[eZ80]], or conflicting with existing [[motherboard]] devices, like the [[Z180]]. |
* Multiple I/O pages, which also allows for internal I/O devices without restricting the address range of the I/O ports like on [[eZ80]], or conflicting with existing [[motherboard]] devices, like the [[Z180]]. |
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* [[Stack overflow]] warning |
* [[Stack overflow]] warning |
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==Notes== |
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==References== |
==References== |
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{{Reflist}} |
{{Reflist}} |
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* {{cite book |
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}} <small>(Note: 20MB pdf file)</small> |
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* {{cite book |
* {{cite book |
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| title = Z80 Family Data Book |
| title = Z80 Family Data Book |
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| access-date = 2009-07-15 |
| access-date = 2009-07-15 |
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{{refend}} |
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==Further reading== |
==Further reading== |
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[[Category:Zilog microprocessors]] |
[[Category:Zilog microprocessors]] |
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[[Category:16-bit microprocessors]] |
[[Category:16-bit microprocessors]] |
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{{microcompu-stub}} |
{{microcompu-stub}} |
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Latest revision as of 13:44, 2 September 2023
 | The topic of this article may not meet Wikipedia's general notability guideline. (August 2023) |
The Zilog Z280 is a 16-bit microprocessor, an enhancement of the Zilog Z80 architecture, introduced in July 1987. It is basically the Z800, renamed, with slight improvements such as being fabricated in CMOS.[1] It was a commercial failure. Zilog added a memory management unit (MMU) to expand the addressing range to 16 MB, features for multitasking and multiprocessor and coprocessor configurations, and 256 bytes of on-chip static RAM, configurable as either a cache for instructions and/or data, or as part of the ordinary address space. It has a huge number of new instructions and addressing modes giving a total of over 2000 combinations. It is capable of efficiently handling 32-bit data operations including hardware multiply, divide, and sign extension. It offers Supervisor and User operating modes, and optionally separate address spaces for instructions and data in both modes (four total possible address spaces). Its internal clock signal can be configured to run at 1, 2 or 4 times the external clock's speed (e.g. a 12MHz CPU with a 3 MHz bus). Unlike the Z80 the Z280 uses a multiplexed arrangement for its address and data busses. More successful extensions of the Z80-architecture include the Hitachi HD64180 in 1986 and Zilog eZ80 in 2001, among others. See further Zilog Z800.
The Z280 had many advanced features for its time, most of them never seen again on a Zilog processor:[2]
- On-chip instruction and/or data cache, or on-chip RAM
- Instruction pipelining
- High performance 16-bit Z-BUS interface or 8-bit Z80-compatible bus interface
- Built-in MMU with memory protection
- Ability to determine which register set is in context with instructions JAF and JAR
- Three on-chip 16-bit counter/timers
- Four on-chip DMA channels
- On-chip full duplex UART
- User I/O trap
- Supervisor mode (privileged instructions)
- Illegal instruction trap[citation needed]
- Coprocessor emulation trap
- Burst mode memory access
- Multiprocessor support, with many bus configuration modes
- Support for multiple external coprocessors through an accelerated communication interface
- Multiple I/O pages, which also allows for internal I/O devices without restricting the address range of the I/O ports like on eZ80, or conflicting with existing motherboard devices, like the Z180.
- Stack overflow warning
References[edit]
- ^ EDN November 27, 1986 p133
- ^ Z280 MPU Microprocessor Unit Preliminary Technical Manual (PDF). San Jose, California: Zilog. 1989. Archived from the original (PDF) on 2019-09-11. Retrieved 2009-07-15.
- Z80 Family Data Book. San Jose, California: Zilog. January 1989.
- Reh, Tilmann (1991-09-16). "The CPU280 and Z280". TCJ. Retrieved 2009-07-15.
Further reading[edit]
- Harston, J.G. (1998-04-15). "Full Z280 Opcode List". Retrieved 2009-07-15.
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