Charge trapping memory

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Charge-trapping memory , English charge-trap flash, CTF is a semiconductor memory technology that is primarily used in EEPROMs and in high-capacity, non-volatile flash memories that are organized as NAND flash or NOR flash . In contrast to the alternative floating gate flash memories are in CT storing the charges (engl. Batch ) is not on an electrically insulated gate of polysilicon stored between the channel and the control gate, but the electron and hole are at bonding locations (engl . trapping center ) a layer of silicon nitride , which is separated from the channel by a thin tunnel oxide is kept.

The advantage of charge-trapping flash memories over floating gate flash memories is a higher storage density per chip area, i.e. a higher yield , fewer process steps in the production of the memory chip, and the easier integration of flash memory with other semiconductor circuits such as a microcontroller in one Chip, and a higher number of write cycles. Until the early 2000s, charge-trapping memories were mainly used for smaller EEPROM memories, while NAND flash, which was designed for high storage capacities, was initially primarily implemented with less expensive floating gate transistors. Due to the advantages of charge-trapping flash memories, since the mid-2000s, NAND flash has been increasingly used in the upper memory segment using charge-trapping memories.

history

The first charge-trapping memories are based on work by H. A .R. Wegener et al. from 1967, who developed a so-called NMOS field effect transistor with programmable threshold voltage ( English threshold voltage ). The charge-trapping memory element served as a charge store in order to be able to permanently change the threshold voltage of the NMOS field effect transistor with a programming voltage of around 50 V until the next programming cycle. In the case of conventional field effect transistors, the threshold voltage can only be set during production and is subsequently an unchangeable component property.

Individual evidence

  1. Dagmar Kirsten: Development, design and application of non-volatile analog value storage elements based on floating gate memory cells in a standard technology . Herbert Utz Verlag, 2011, ISBN 978-3-8316-4136-9 , p. 7 ( limited preview in Google Book search).
  2. ^ Betty Prince: Embedded non-volatile memories . Ed .: Proceedings of the 20th annual conference on Integrated circuits and systems design, SBCCI 2007. ACM, New York 2007, p. 9-9 , doi : 10.1145 / 1284480.1284490 .
  3. ^ H. A R. Wegener, AJ Lincoln, HC Pao, MR O'Connell, RE Oleksiak, H. Lawrence: The variable threshold transistor, a new electrically-alterable, non-destructive read-only storage device . Ed .: Sperry Rand Research Center. tape 13 . IEDM (International Electron Device Meeting), Technical Digest, 1967, p. 70 , doi : 10.1109 / IEDM.1967.187833 .