Chip Scale Package

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two WLCSP and a SOT23 housing on a US $ penny
Wafer Level Chip Scale Package (WLCSP) with three connection pins, 1.0 mm × 0.5 mm

Chip Scale Package ( CSP , Engl .; at German housing in the magnitude of the ) is a chip package of integrated circuits , in which the housing up to 20% more surface than the mind what can be seen, the connections for SMD -Bestückung without bonding with to whom they must be connected.

In order to be able to achieve the small footprint of the housing, either flip-chip assembly (the die is reversed on the board after its external contacts have been metallized) or the WLCSP method is used. With the WLCSP method, a protective varnish is applied to the bottom to protect the die and a plastic housing is applied from above.

The CSP thus represents a further development of the Ball Grid Array (BGA), which is based on ideas from employees at Fujitsu and Hitachi Cable and was first implemented by Mitsubishi Electric .

The mechanical load-bearing capacity of the CSP is significantly lower than that of the BGA, as forces from the soldering points are transferred directly to the die.

Reducing the size of the housing is useful in medical technology , for example for diagnostic devices that can be swallowed, and in high-frequency technology for short transmission paths.

Individual evidence

  1. ↑ J-STD-012 . Surface Mount Council. Retrieved June 3, 2016.
  2. ↑ CSP package . IT knowledge. Retrieved September 19, 2013.
  3. ↑ Dr. Reza Ghaffarian: Chip Scale Review . NASA . 1999. Retrieved November 25, 2015.