Extraction (electrical engineering)
The extraction is a step in the layout verification of integrated circuits . It is used to provide information for checking the generated layout. The extraction is therefore a preparatory step in order to verify the implementation of the specified functionality and the associated performance parameters during the layout design . In doing so, layout information is translated into a representation suitable for the actual verification programs.
- During circuit extraction, the geometric layout structures are examined to determine which functional units, such as components and connection structures, they implement. This layout information enables the generation of a netlist , which is then used in the netlist comparison, the Layout Versus Schematic (LVS).
- During the parameter extraction, the amounts of electrical quantities are derived from the geometric properties of individual layout structures. In this way, capacities and resistances can be assigned as parameters to the individual components. The information that results from the electrical parameters determined in this way and the network list are then used to check compliance with the electrical power specification of the circuit.