Intel 8237

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The 8237A-5 on a motherboard
Pin assignment of the 8237

The Intel 8237 is a programmable DMA controller block from the family of peripheral components of the 8-bit microprocessors Intel 8080 / 8085 . He was also in 16-bit systems with processors Intel 8086 / 8088 and its successors and the first IBM PC used.

General

He was u. a. licensed to NEC .

Layout and function

The 8237 is a further development of the 8257 and, like this one, is supplied in a 40-pin DIL housing . With the help of the DMA controller, larger amounts of data can be transferred to or read out from the system memory using fast direct memory access without further intervention by the CPU . Data rates of up to 1.6 Mbytes / s are achieved. The 8237 supports four DMA channels for the transmission of data from external components or memories, whereby the number of channels can be expanded as required with additional modules. As a peripheral component of an 8-bit microcontroller family, the 8237 has 8-bit data and 16-bit address lines, so each channel can address 64 Kbytes of memory areas and transfer up to 64 Kbytes of data with one control command.

If a DMA channel wants to carry out a data transfer, the DMA controller must be informed of the corresponding channel via a DREQ (DMA request) signal. The controller then uses an HRQ (hold request) signal to indicate to the CPU that it wants to access the memory. If the CPU can release the data bus, it confirms this to the DMA controller with the HLDA (Hold Acknowledge) signal. Then the DMA channel of the 8237 can carry out the data transfer in four different operating modes:

  • Single mode

Alternating with the CPU, the DMA unit can each access the memory for one memory cycle, the address pointer and word counter being reduced in each case.

  • Block fashion

A complete block of data is transferred until either the complete transfer has been completed or the DMA channel is prompted to end prematurely by an EOP (End of Process) signal.

  • Demand mode

The data transfer is continued until the transfer request is indicated by the absence of the DRQ signal or one of the other conditions as in block mode ends the transfer.

  • Cascade fashion

When several 8237 modules are cascaded, the corresponding DMA control signals of the individual modules are linked to form a priority chain.

use

It has been used since the first PCs ( IBM-PC and IBM-PC XT ). In the IBM PC AT two copies are used and connected in cascaded form.

Literature and data sheets

Web links

  • FreeBSD Developers' Handbook: Chapter 15 DMA (illustrated using the 8237 as an example).

Individual evidence

  1. 8237 / 8237-2 High Performance Programmable DMA Controller. In: data sheet. Intel, accessed June 17, 2016 .
  2. Chemnitz University of Technology: The structure of the original IBM PC motherboard ( Memento of the original from December 8, 2011 in the Internet Archive ) Info: The archive link was automatically inserted and not yet checked. Please check the original and archive link according to the instructions and then remove this notice. . @1@ 2Template: Webachiv / IABot / www.tu-chemnitz.de
  3. Chemnitz University of Technology: The AT motherboard ( Memento of the original from January 6, 2012 in the Internet Archive ) Info: The archive link was automatically inserted and not yet checked. Please check the original and archive link according to the instructions and then remove this notice. . @1@ 2Template: Webachiv / IABot / www.tu-chemnitz.de