Load / Store architecture
A load / store architecture is a processor architecture whose instruction set allows data memory access exclusively with special load ( load ) and memory ( store ) instructions. It is also known as the register-register architecture. RISC architectures are fundamentally defined by their properties as load / store machines. While classic CISC architectures allow direct memory access for ALU commands (such as adding or multiplying), with load / store architectures this is only possible in several steps by temporarily storing the arguments in registers . Therefore, the register set is usually larger compared to CISC systems.
Examples of a load / store architecture are almost all RISC architectures such as SPARC , MIPS , SuperH , Alpha or ARM . In contrast, the architecture of the x86 processors is not a load / store architecture.
Individual evidence
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