The instruction set ( English instruction set ) of a processor is in the computer architecture , the amount of machine instructions that can perform a particular processor. Depending on the processor, the scope of the instruction set varies between, for example, 33 and over 500 instructions. CISC processors tend to have larger instruction sets than RISC processors; the same applies to newer processors compared to older processors.
In a broader sense, the term “instruction set” denotes the set of instructions (also synonymous for “instruction set”) of a programming language in general.
An instruction set is called orthogonal if every instruction can also use any type of addressing of the processor. The addressing type of a processor is understood to mean the way in which a processor can calculate the effective address of operands using address information, offsets and register contents .
An instruction set is called symmetric if all data types and addressing types of an instruction are permitted not only for its source but also for its destination operands. The data types of a processor include all types that can be processed directly by means of machine instructions (i.e. without software emulation).
The individual commands of an instruction set usually contain an opcode and one or more operands; the structure and format of this information are standardized for each command type.
Which command is meant is specified by the opcode. The width of the words used in an instruction set (i.e., opcode / operand combinations) varies significantly depending on the type of processor. In particular, it can be larger than that of ordinary memory words, i.e. H. than the data bus width of the processor. In this case, the commands have to be loaded from the memory into the processor by several memory accesses.
This "two-operand instruction form" is a typical, but not the only one that occurs. There are also processors that allow commands with a maximum of one operand as well as those that allow up to three operands. In the case of a single operand, all instructions that affect two variables must use a processor-internal register (e.g. the accumulator ) as the second operand (implicitly) . The three-operand commands differentiate between source, linked value and result target, so that the source does not have to be overwritten.
The instruction set of a microprocessor is roughly composed of a few types of instructions.
With transfer commands data is moved within the system. Storage locations or processor registers can be used as the source and destination . The data is typically not changed and only copied; H. remain unchanged at their source location. Depending on the command and the type of processor, individual bytes or several can be transported at once. In the case of more complicated types of addressing, additional registers and possibly calculations can come into play for both the source and the destination, e.g. B. to process data stored in tabular form via indexed addressing or to copy entire memory areas. The command names are usually based on the English words move , load , store or transfer .
The contents of memory cells are modified with commands for data manipulation (examples: shift, convert)
Arithmetic and logic commands perform the same operations on existing values. So here z. B. calculated, counted or an AND operation performed. The main operand is very often a processor register (in most cases the accumulator ), but not necessarily. Otherwise, the same applies to the operands as to the transfer commands above. The command names are mostly English abbreviations for the respective operation, such as B. ADD or AND .
Input / output commands are used to read and write data via peripheral devices , the connection media to the “outside world of the computer”.
Jump commands (also called commands for program control or also for program control ) lead to branches within a program flow, to the formation of loops , reactions to different numerical values and calling of subroutines . A distinction is made here between unconditional jumps and conditional jumps, the latter typically following a branch or not depending on the state of certain bits of the processor status register. The command names are usually based on the English words jump or branch .
Stack commands store data on the stack (command name usually English push , for "(on the stack) push") or retrieve data from there (command name pop or pull , for "pull"). The stack pointer register is automatically updated. Here too, one or more bytes are moved at once, depending on the command and processor type. Many CPUs do not have stack instructions .
Combined commands are composed of elementary actions of the above command types. For example, when a subroutine is called, a jump is usually carried out and the previous program address is stored on the stack as the return destination. Some processors support counting loops e.g. B. by commands that both count up or down a counter status, and when the count limit is reached (e.g. underflow when counting down to zero) execute a conditional (back) jump. Instructions like the latter in particular are typical for CISC processors.
Instruction set architectures
If one wants to summarize a family of processors with a similar instruction set, one speaks of an instruction set architecture (English Instruction Set Architecture , short: ISA). Common instruction set architectures are for example:
- IA-32 (32-bit ISA of the original 16-bit x86 architecture ; the 64-bit x64 extension can also be assigned to IA-32)
- IA-64 (the Itanium architecture ; not to be confused with x64)
- Power and PowerPC (or the PAPR specification)
- Great Microprocessors of the Past and Present (V 12.1.2) ( Memento from July 7, 2012 in the Internet Archive ) (English) - Overview of instruction sets and computer architectures at Computer Engineering Technology
- embedded 16-bit microcontroller - Page at EmbeddedExpert.com
- Duden Informatik ISBN 3-411-05232-5
- Example in standard and individual solutions for information systems see online "... the command set of the programming language ABAB ..."
- hu Berlin in Technische Informatik 2: Instruction set: Elegance vs. Efficiency (PDF; 166 kB) ( Memento from November 30, 2015 in the Internet Archive )