Norman Jouppi

Norman Paul "Norm" Jouppi is an American computer engineer.

Life

Jouppi was one of the computer architects on Stanford University's MIPS project (under John L. Hennessy ), an early RISC project. He received his master's degree in electrical engineering from Northwestern University in 1980 and received his PhD from Stanford University in 1984 (Timing Verification and Performance Improvement of MOS VLSI Designs) and went to the Western Research Laboratory of Digital Equipment Corporation in 1984 . He was with Compaq and from 2002 with Hewlett-Packard , where he headed the Advanced Architecture Lab in the HP Labs in Palo Alto from 2006 to 2008 and then from 2008 to 2010 the Exascale Computing Lab and 2010/11 the Intelligent Infrastructure Lab. Then he was a computer engineer at Google.

Developments in the area of ​​memory hierarchies ( victim buffer , prefetching stream buffer , multi-level exclusive caching), heterogeneous architectures (single ISA heterogeneous architectures) and the introduction of CACTI tools for memory design (modeling of cache time , Area and power).

He was the main architect of four microprocessors and contributed to the development of graphics accelerators. He is also concerned with telepresence technology and the application of nanophotonics in the computer field.

In 2015 he received the Eckert-Mauchly Award for contributions to the design and analysis of high-performance processors and computer storage systems. He became a Hewlett Packard Fellow in 2002, a Fellow of the IEEE in 2003 and a Fellow of the ACM in 2007 . In 2014 he received the Harry H. Goode Memorial Award. In 2002 he received the Compaq Key Patent Award.

From 2007 to 2011 he was head of the computer architecture department (SIGARCH) at ACM.

From 1984 to 1996 he was also an advisory assistant or associate professor at Stanford University. He holds over 35 US patents. He is on the editorial board of Communications of the ACM and IEEE Computer Architecture Letters.

Web links

• Jouppi named ACM Fellow, 2007 (English)
• CV 2011 (PDF; 8.88 kB; English)

Individual evidence

1. ↑ Jouppi, Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers, Proc. 17th Int. Symposium Computer Architecture (ISCA), Seattle 1990, IEEE, pp. 364-373
2. ↑ Eckert Mauchly Award 2015 ( Memento of the original from September 6, 2015 in the Internet Archive ) Info: The archive link was inserted automatically and has not yet been checked. Please check the original and archive link according to the instructions and then remove this notice. (PDF; 102 kB; English)