Serial vector format

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The Serial Vector Format ( SVF for short ) is a file format for exchanging boundary-scan test vectors. It was jointly developed in 1991 by Texas Instruments and Teradyne with the aim of a manufacturer-independent description of JTAG operations. Today it is maintained by the company ASSET InterTech. In addition to being used in ATE systems , the serial vector format is also common as a programming file for programmable logic circuits and microcontrollers .

construction

SVF files contain a sequence of SVF statements that describe how the JTAG state machine is to be run through. The two essential commands are the shift instructions SIR ( Scan Instruction Register ) and SDR ( Scan Data Register ). SIR performs a shift operation into the instruction register, SDR a shift operation into the currently active data register, each with a specified number of bits . A value can be specified as a parameter, which is pushed into the register, as well as an expected output value. A bit mask can also be assigned to both parameters , which indicates which of the shifted bits should be evaluated. These parameters are specified in hexadecimal . In the event that a JTAG chain contains more than one component, a header and a trailer can be specified which include the additional bits in the shift operations that are required for traversing the other components. The RUNTEST command keeps the JTAG state machine in the runtest / idle state for a certain time or a certain number of TCK clock edges. This instruction can be used, for example, to implement waiting times for programming algorithms.

SVF is an ASCII format so it can be easily read and modified. A line can be up to 256 characters long, but an instruction can span several lines. Each statement ends with a semicolon. Comments can be preceded by an exclamation mark '!' or insert two slashes '//'.

example

// Testbus Reset, Instruction- und Data-Register-Scans im IDLE-State beenden.
TRST ON;
TRST OFF;
ENDIR IDLE;
ENDDR IDLE;
// Angabe der maximal erlaubten TCK-Frequenz, hier 1 MHz.
FREQUENCY 1E6 HZ;
// Header und Trailer auf 0 setzen (es befinden sich keine weiteren Bausteine in der JTAG-Chain).
HIR 0;
HDR 0;
TIR 0;
TDR 0;
//Ein acht-Bit breites Instruction Register mit 0x42 laden.
SIR 8 TDI (42);
// 10 TCK warten
RUNTEST 10 TCK;
// Ein 32-Bit breites Datenregister lesen, es wird der Wert 0x1234567 erwartet.
SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f1234567) MASK (0fffffff);
// Instruction 'Bypass' laden.
SIR 8 TDI (ff);
// Ende

variants

One variant is the XSVF format from Xilinx . In contrast to the SVF, XSVF is not an ASCII file , but a binary file ; it is a kind of compressed form of an SVF file. The binary representation enables smaller file sizes to be achieved.

A file format similar to SVF is the Standard Test and Programming Language (STAPL) developed by Altera and specified by JEDEC as JESD71 since August 1999 .

Individual evidence

  1. ↑ Xilinx Application Note XAPP503: SVF and XSVF File Formats for Xilinx Devices (English; PDF; 381 kB)
  2. ↑ ISP & the Jam STAPL ( Memento from July 6, 2009 in the Internet Archive ) (English)
  3. ↑ JESD71: Standard Test and Programming Language (STAPL) (English, registration required)

Web links