Video display controller

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A TMS9918A type VDC

A video display controller ( VDC ) is an integrated circuit that provides the direct interface between the data processing system ( home computer , game console, etc.) and the graphic output / image generator, e.g. B. monitor or television set realized.

task

Its job is to control the imager.

Sub-functional units

Block diagram of a uPD7220 VDC

A video display controller can be divided into several functional units:

Image buffer
Any type of random access memory for writing and reading. The image buffer is the main interface between the video display controller and the image generator, i.e. the CPU or GPU. The size of the image buffer determines the maximum image resolution and color resolution. In very early graphics cards, the soldered random access memory was only used as a screen buffer. So you could calculate the maximum possible image and color resolution based on the size of this memory. A raster image with 320 × 240 pixels with 8-bit color resolution requires 76,800 bytes, 640 × 480 pixels and 24-bits require 921,600 bytes, 1024 × 768 pixels with 24-bits require 2,359,296 bytes of memory. If "double-buffering" or "tripple-buffering" is used, double or triple as much memory is required. Modern graphics processors can do much more, large amounts of memory are required for intermediate calculations or simply for textures. Part of this huge graphics memory is used as an image buffer; it is not advantageous to connect an extra memory.
Already based on the color resolution of z. B. 8bit you can guess that the screen also needs an interface, namely the interface to the input device. 8 bit color depth means 2 8 so 256 possible colors per pixel. The monitor has no pixels at all, but each pixel is made up of 3 sub-pixels for the colors red, green and blue; d. H. something in or in front of the monitor has to calculate color values ​​for the sub-pixels from the 8-bit color information per pixel or take it from a table.
Logic unit
The image data, which come either from the CPU or from the GCA, are written into the image buffer by them. The logic unit reads the data out of this buffer again and sends them to the PHY. The data needs meta information: image resolution and color depth. In addition, it must be clear in which format (e.g. RGBA8888, ARGB8888 etc.) the individual pixels are encoded.
The logic unit can u. U. also drive, and z. B. set the desired screen resolution, color depth and refresh rate. Control via this logic unit is provided for all modern monitors.
If an image can and should be output on several monitors at the same time, the desired configuration is guaranteed by the logic unit.
Pre-PHY
Depending on which specification is used to communicate with the imager, the data must be processed accordingly, e.g. B. must u. U. the present color format, such as RGBA8888, in another color format, e.g. B. to YC B C R 4: 4: 4. Common interfaces are VGA , DVI , HDMI or DisplayPort .
The RAMDAC converts a digital into an analog signal. It is only necessary if an analog electronic interface is supported. The frequency of the RAMDAC can limit the maximum possible image resolution and frame rate.
PHY
Function block, which converts the incoming data into a signal which z. B. specified according to Low Voltage Differential Signaling or Transition-Minimized Differential Signaling is generated. It is this signal that is sent to the imager via a cable.
EDID reader
Polls data from the monitor.

history

Old graphics cards contained a chip that only implemented a video display controller. A modern graphics processor (GPU) also includes a display controller, also called a display engine. However, this occupies only a negligibly small proportion of the total area of the .

The VDC was the main part of the video signal generator logic, but sometimes there are other supporting chips as well, like RAM to hold the pixel data and ROM to store fonts. In pure text systems, the VDC takes on the task of generating the letters from the character values ​​in the main memory and the font. Some VDCs were already able to do some tasks independently using shift registers and pallets . For example, the graphics processor of the Nintendo Entertainment System was responsible for displaying the sprites on the screen. If no additional RAMDAC is available, the VDC generates the timing signals of the video signal, i.e. the clock signals for the screen's cathode ray.