Random Access Memory

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Random-Access Memory (der or das; English random [-] access memory , in German : "memory with random / direct access " = random access memory ), abbreviated RAM , is a data memory that is used as main memory in computers , mostly in Form of several memory components on one memory module . The most common forms belong to the semiconductor memories . RAM is implemented as an integrated circuit mainly in silicon technology and is used in all types of electronic devices.

DRAM chip U61000D with 1  MiBit .


Basic arrangement of the memory cells in rows and columns (matrix) in a RAM

The designation of the memory type as "optional" means in this context that each memory cell can be addressed directly via its memory address. The memory does not have to be read out sequentially or in blocks. In the case of large memory modules, however , the addressing does not take place via the individual cells, but via a word , the width of which depends on the memory architecture. This distinguishes the RAM of blocks to be written memories, the so-called flash memory .

The term random access memory is always used today in the sense of “ read-write RAM” ( read-write random-access memory  - RWRAM). There are other types of memory with random access, in particular read-only memory modules ( read-only memory , ROM). Since the term RAM is misleading, attempts were made at times to establish the name “ read-write memory ” (RWM, read-write memory), but this was not successful.


The origin of the term goes back to the early days of modern computers, in which all data was stored on sequentially read memory formats such as punch cards or magnetic tapes, which were loaded into fast computational registers for processing . To provide interim results hold fast, were temporarily delay lines ( English delay line used) for intermediate values until then the ferrite core were introduced. These writable memories already had the same form of matrix access as today's RAMs. At that time, the fast memory types were all writable and the main innovation consisted in the random access of the magnetic core memory and the RAM modules that were subsequently placed on semiconductor memories.

Control of RAM chips

Different DDR RAM memory modules

Depending on the type of RAM module, the control takes place synchronously with a clock signal or asynchronously without a clock. The main difference is that with the asynchronous variant the data is only available or written after a certain, block-dependent runtime. These, among other things, material-dependent, temporal parameters have specimen scatter and are dependent on various influences, which is why the maximum throughput is more limited with asynchronous memories than with synchronous memory controls. With synchronous memories, the timing of the control signals is determined by a clock signal, which results in significantly higher throughput rates.

Synchronous RAMs can be both static and dynamic RAMs (see below). Examples of synchronous SRAMs are burst SRAMs or ZBTRAMs . Asynchronous SRAMs are mostly slower low-power SRAMs that are used, for example, in smaller microcontrollers as external data storage devices. In the case of dynamic RAMs, the synchronous SDR-SDRAMs that have been in use since the late 1990s and their successors, the DDR-SDRAMs , should be mentioned as an example, while the DRAMs that were common before that, such as EDO-DRAMs, were asynchronous DRAM components.

Control lines
A control line tells the chip whether to read or write. Most say the pin R / W . Often there are their own chip select pins CS and / or output enable pins OE . If one of these pins sets the chip to inactive, the data lines (see below) in particular are switched to high resistance ( tri-state ) so as not to interfere with the bus signals of the other, now active chips. When it comes to DRAMs, there is a separate pin to differentiate between RAS and CAS address part (see below). This is usually called RAS / CAS .
Today, RAM chips usually have fewer data pins than the word length required by the processor or its memory controller. A corresponding number of RAM chips are therefore combined to form a “bank”, which is then addressed via a common chip select signal. Your data lines together then cover the entire word length. In order to address bits in a bank, the memory controller sends the address information to the corresponding bank via corresponding address bus lines . In DRAMs, the address bus is normally multiplexed and routed into the component in two halves via identical pins, once as RAS ( English row address strobe ) and once as CAS ( English column-address strobe ). In contrast, with SRAMs, for the purpose of higher speed, the entire address bus is usually routed to pins, so that access can take place in a single operation.
Data lines
A RAM chip has at least one bidirectional (namely controlled by the R / W pin) data line. Often there are also 4, 8 or 16 data pins, depending on the design. The capacity of a chip in bits then results from the data bus width times the number of possible address values ​​(2 address bus width ) or in the case of DRAMs (2 2 × address bus width ).

Supply voltage

The energy requirement of the volatile RAM types depends heavily on their operating voltage ; it generally increases as the square of the voltage. Depending on the memory size, it can be several watts , which has a noticeable effect on the battery life , especially with mobile devices . Therefore, manufacturers are continuously trying to reduce energy consumption and enable a lower supply voltage.

The supply voltage of ( JEDEC- compliant) SDRAM is shown in the following table:

Type Voltage (V)

Types of RAM

There are different technical implementations of RAMs. The most common today are mainly used in computers and are "volatile" (also: volatile), which means that the stored data is lost when the power supply is switched off. There are, however, types of RAM that receive their information even without a power supply (not volatile). These are called NVRAM . The following list is arranged according to the basic functional principle:

Static RAM (SRAM)

Static RAM (SRAM) usually refers to smaller electronic memory components in the range of up to a few MiBit . As a special feature, they retain their memory content, which is stored in bistable multivibrators , without running refresh cycles - all that is required is a supply voltage. The name is also derived from this fact; Historically, it also applies to core storage , which even without tension does not change its state for years.

SRAM requires significantly more components (and chip area) than DRAM (see below) - specifically four to six transistors per memory bit compared to one (plus a storage capacitor) in a DRAM cell - and is therefore too expensive for large amounts of memory. However, it offers very short access times and does not require any refresh cycles as with DRAM.

Applications are, for example, in computers as cache and in microcontrollers as main memory. Its content is volatile (volatile; English volatile ), that is, the stored information is lost when power supply is removed. In combination with a backup battery , a special form of non-volatile memory NVRAM can be implemented from the static RAM , since SRAM cells without access cycles only have a very low power requirement and the backup battery can hold the data content in the SRAM for several years.

Dynamic RAM (DRAM)

Basic structure of a DRAM cell

Dynamic RAM (DRAM) refers to an electronic memory module that is mainly used in computers as working memory . Its content is volatile, i.e. the stored information is lost when the operating voltage is switched off. With DRAM, however, the information is quickly lost even if the operating voltage is maintained (!) And therefore has to be " refreshed " regularly - hence the name "dynamic".

The information is stored in the form of the state of charge of a capacitor - for example 'charged' = '1', 'discharged' = '0'. Its very simple structure makes the memory cell very small (6 to 10  ), but the capacitor with its low capacitance discharges quickly due to the leakage currents that occur and the information content is lost. Therefore, the memory cells must be refreshed regularly. DRAM modules with a built-in control circuit for refreshing can behave like SRAM to the outside world. This is known as pseudostatic RAM .

Compared to SRAM, DRAM is much cheaper per bit , which is why it is mainly used where a large amount of RAM is required, for example for the main memory of a computer.

Phase-change RAM (PCRAM, PRAM)

Structure of a PRAM cell

Phase-change RAM (PRAM) may be. a. still under developmentat Samsung . It should serve as a replacement for S and DRAM and have advantages over NOR flash memory, for example write access should be significantly faster and the number of write / read cycles should be many times higher than NOR flash memory. It takes up less space and is easier to manufacture.

Resistive RAM (RRAM, ReRAM)

Resistive RAM (RRAM or ReRAM) is a non-volatile type of electronic RAM memory that stores information by changing the electrical resistance of a weakly conductive dielectric.


  • RW Mann, WW Abadeer, MJ Breitwisch, O. Bula, JS Brown, BC Colwill, PE Cottrell, WG Crocco, SS Furkay, MJ Hauser: Ultralow-power SRAM technology . In: IBM Journal of Research and Development . tape 47 , no. 5 , 2003, p. 553-566 , doi : 10.1147 / around 475.0553 .

Web links

Commons : RAM  - collection of pictures, videos and audio files

References and footnotes

  1. RAM. In: duden.de. Retrieved September 23, 2019 .