Synchronous Dynamic Random Access Memory

from Wikipedia, the free encyclopedia
SDRAM module
SDRAM memory modules on a motherboard

Synchronous Dynamic Random Access Memory (engl., Short SDRAM , dt. "Synchronous DRAM ") is a semiconductor memory variant, for example, as a memory in computers is used.

The short form may also be a SDRAM with SDRAM chips populated DIMM - or SO-DIMM - PCB call.

SDRAM is a clocked DRAM technology. The cycle is specified by the system bus , possibly also by a separate memory bus connected to the system bus . The clocking takes place through the use of registers for address inputs, control information as well as the input / output data, in that value changes in the registers are only carried out with the clock edges. The use of a clock cycle for synchronization means that the communication required for asynchronous procedures (e.g. via handshake procedures) is no longer necessary . In addition, buffer and pipelining techniques can be used by using the registers , so that overall time savings are significant. SDRAM is about twice as fast as its predecessor EDO-DRAM . The first generation of SDRAM modules were used in PCs from around 1996 to 2001. Then it was replaced by DDR-SDRAM , in which the data rate could be almost doubled by using both clock edges.

Different types

The types commonly used as main memory are:

  • PC-66-SDRAM: Standard defined by Intel in which the SDRAM is ideally operated at a speed of 66 MHz. The soldered-on memory chips have an access time of 12 ns (rarely) or 10 ns.
  • PC-100 SDRAM: Standard defined by Intel, in which the SDRAM is ideally operated at a speed of 100 MHz, downward compatible with PC-66 motherboards (operation at 66 MHz is possible). The soldered-on memory chips have an access time of 8 ns.
  • PC-133-SDRAM: With the clock speed increase of the front side bus to 133 MHz, VIA forced the PC-133-SDRAM to operate at the same speed in order to fully exploit the speed advantage of the clock speed increase. Downward compatible with PC-66 / -100 motherboards (operation with 66 MHz or 100 MHz possible). The soldered-on memory chips have an access time of 7.5 ns (marking on the chips rarely -7.5, but mostly a bit irritating -75) or 7.0 ns.
  • PC-150/166-SDRAM: Particularly powerful SDRAM that, depending on the manufacturer's specifications, can be operated in the eponymous MHz range.

PC-66, PC-100 and PC-133 have been specified as standards by the responsible JEDEC committee. In contrast, the PC-150 and PC-166 modules are only overclocked PC-133 modules that have been approved by the manufacturer for operation at 150 and 166 MHz, respectively.

SDRAM modules were produced in the storage capacities 16  MiB , 32 MiB, 64 MiB, 128 MiB, 256 MiB, 512 MiB and 1024 MiB (rarely); usually four, eight or sixteen chips were used per DIMM. 16 MiB modules occur practically only as single-sided modules, 32 MiB and 1024 MiB modules practically only as double-sided modules. All other sizes are available as single-sided and double-sided modules.

There are also modules with a CAS latency of two (CL2) and one of three (CL3), the latter of which work slightly more slowly. CL3 modules also often allow operation with CL2 at a lower clock frequency. Suitable PC-100-CL3 modules up to a maximum of 66 MHz clock frequency can be operated with CL2, corresponding to PC-133-CL3 modules up to a maximum of 100 MHz clock frequency with CL2. PC-133-CL2 modules are usually equipped with memory chips with an access time of 7.0 ns.

Registered SDRAM

Registered SDRAM has nothing to do with the registration of the SDRAM-DIMM data specification in the SPD- EEPROM ( Serial Presence Detect ) on the memory module, with whose “ registered ” function is often confused. For more information see under Registered Module .

As a Registered SDRAM SDRAM modules are called, which with a tab feature for the address and control lines. Registered SDRAM DIMMs thus reduce the load (fan-out) they cause on the motherboard, so that larger and more DIMM modules can be used. This is a widely used technique on servers to increase the maximum possible memory size. A Registered SDRAM-DIMM can be accessed somewhat more slowly than a corresponding unbuffered module.

Buffered / unbuffered SDRAM

SDRAM-DIMMs of high storage capacity with their large number of memory cells cause higher capacitive and inductive loads on the address and control lines at today's high clock rates compared to SDRAM-DIMMs of smaller storage capacity . Therefore, some board designers put double driver buffers on the SDRAM DIMM module in order to amplify the signals on the lines and to reduce the system load compared to otherwise identical memory modules with these additional output buffers. However, these buffers cause a small time delay in the electrical impulses, so adding such buffers to a normally densely populated module without a buffer leads to a slowdown in the signals compared to the same module with output buffers. This is a technique, which is also mainly used in the server sector, in order to increase the maximum possible memory size on a system board (mainboard).

Operating voltage

SDRAM memory chips require an operating voltage of 3.3 V.

Compatibility problems

More recent PC133 modules may be incompatible with the early memory controllers with SDRAM support. So it happens that newer PC133 modules do not work properly on older motherboards , although the DIMMs are still within the chipset or motherboard specifications in terms of their total memory capacity . A typical example are 256 MiB PC 133 modules on Super Socket 7 mainboards with the VIA Apollo MVP3 chipset . While older DIMMs, double-sided with eight 128- Mibit equipped chips to work properly on such motherboards work newer one side only recognized with eight 256-Mibit chips stocked 256 MiB memory modules are not or only as a 128 MiB-DIMM . In addition to the storage density, an unfavorable internal organization of the SDRAM chips used can also impair the compatibility with the memory controller. 512 MiB and 1024 MiB modules do not work at all on motherboards with VIA's Apollo MVP3 chipset. One reason can be a capacitive load that is too high due to too many parallel memory cells, which overwhelms the driver and leads to soft clock edges.

Technical development

If value changes are possible with both positive and negative clock edges, this is called DDR-SDRAM ( Double Data Rate SDRAM ). DDR-SDRAM represents the further development of SDRAM technology. For linguistic purposes, the first generation of SDRAM technology is now also called SDR-SDRAM ( Single Data Rate SDRAM ). While SDR-SDRAM-DIMMs only have 168 pins, DDR-SDRAM modules already have 184 pins.

See also

Individual evidence

  1. ↑ SDRAM - Synchronous DRAM . Elektronik-Kompendium.de. Retrieved September 9, 2016.
  2. ↑ History of RAM: SDRAM, RDRAM, DDR, DDR2, DDR3 . ComputerBild.de. Retrieved September 9, 2016.
  3. ↑ Robert Köhring, Mirko Wünsch: 4. Storage technology - DRAM storage modules In: IBM-PC storage technology - RAM storage , elaboration for the introductory seminar IBM-PC (SS 1998), Chemnitz University of Technology, Faculty of Computer Science.
  4. ↑ Support from Shuttle Computer Handels GmbH : Memory and Cache - SIMMs and DIMMs
  5. ↑ SDRAM tutorial - Generations of SDRAM

Web links