VIA Apollo
The VIA Apollo series from VIA Technologies is a family of chipsets for PC motherboards . These chipsets are suitable for socket 5 or socket 7 and thus support a large number of processors from different companies.
Models
Apollo Master
The first chipset from VIA Technologies for socket 5 , the Apollo Master (VT82C570M), came onto the market in 1995 and was mainly installed on very affordable mainboards. The chipset consists of the "system controller" VT82C575M, the "PCI bus controller" VT82C576M and two instances of "data controllers" VT82C577M, has therefore not been the usual on later models divided into North and South Bridge . The VT82C575M houses the memory controller of the Apollo Master. It supports both FPM-DRAM and EDO-DRAM and can manage up to 512 MB. The VT82C575M also takes on tasks for connecting the PCI bus , namely the conversion of 64-bit data into 32-bit data and the generation of commands, and provides functions for implementing the ISA bus . The VT82C576M contains further function blocks for the management of the PCI and ISA bus. The Apollo Master supports PCI in Generation 2.1, the manufacturer specified 110 MB / s as the maximum transfer rate between PCI and system memory. The VT82C576M also manages the two channels of the IDE interface . The IDE interface of the Apollo Master supports transfer rates of up to 22 MB / s via PIO mode 5 . The two interconnected instances of the VT82C577M provide different data buffers . The network is connected on the one hand to the main processor and on the other hand to the DRAM , the PCI and the ISA bus. For the implementation of a clock generator , the real-time clock with CMOS memory , the plug-and-play control and the keyboard controller with PS / 2 mouse support , another chip was provided by VIA Technologies, namely the VT82C416.
Apollo VP
The Apollo VP (VT82C580VP) was introduced in 1996 and consists of the “system controller” VT82C585VP, the “PCI-to-ISA bridge” VT82C586 and two instances of the “data buffer” called VT82C587VP. The memory controller of the VT82C585VP supports FPM and EDO DRAM as well as SDRAM with 66 MHz memory clock.
Apollo VPX (/ 97)
As an innovation compared to the Apollo VP, the Apollo VPX (VT82C580VPX) introduced in 1997 offers the option of operating the Front Side Bus (FSB) asynchronously to the PCI bus. This improves or enables support for the Cyrix 6x86PR-200 + , which has an FSB clock of 75 MHz.
The Apollo VPX / 97 variant indicates that the improved VT82C586B southbridge is used instead of the VT82C586A southbridge and that the chipset is thus PC-97 compatible.
Apollo VP2 (/ 97)
The Apollo VP2 , also presented in 1997, is the first VIA chipset that combines functions common to Northbridge in just one chip, the “system controller” VT82C595. However, the VT82C595 only supports the synchronous clocking of FSB and PCI bus. The clock rate of the FSB is therefore limited to 66 MHz.
For the Apollo VP2 / 97 variant, the improved VT82C586B is used instead of the Southbridge VT82C586A ; it is PC-97 compatible. The Apollo VP2 / 97 was licensed by Advanced Micro Devices and sold as the AMD 640 .
Apollo VP3
The Apollo VP3 can then come up with AGP 1.0 . Otherwise it largely corresponds to the Apollo VP2 / 97
Apollo MVP3
The Apollo MVP3 , introduced in 1998, complements the properties of the Apollo VP3 with a front side bus clocked at 100 MHz and thus supports AMD's Super7 concept . It is the first chipset to support the AMD K6-2 and AMD K6-III processors with an FSB of 100 MHz. The Apollo MVP3 consists of the Northbridge VT82C598MVP, supplemented by the Southbridge VT82C586B or VT82C596 (B). While the combination with VT82C586B was intended by the manufacturer for use in desktop computers , the combination with VT82C596 (B) should be used in notebooks . In fact, the Southbridge VT82C596 (B) was also installed on some motherboards for desktop computers.
Apollo MVP4
The Apollo MVP4 , introduced in 1999, is one of the first IGPs and has a Blade3D graphics core licensed by Trident Microsystems . Otherwise it largely corresponds to the Apollo MVP3.
Model overview
| Furnishing | Apollo Master (VT82C570M) | Apollo VP (VT82C580) | Apollo VPX (/ 97) (VT82C580VPX) | Apollo VP2 (/ 97) (VT82C590) | Apollo VP3 | Apollo MVP3 | Apollo MVP4 IGP |
|---|---|---|---|---|---|---|---|
| Components: | VT82C575M, VT82C576M, VT82C577M, VT82C416 | VT82C585VP, VT82C587VP, VT82C586 | VT82C585VPX, VT82C587VP, VT82C586A / B | VT82C595, VT82C586A / B | VT82C597AT, VT82C586B | VT82C598MVP, VT82C586B or VT82C596 (B) | VT8501, VT82C686A |
| Integrated graphics core : | - | - | - | - | - | - | Trident Blade3D |
| Maximum FSB cycle: | 66 MHz | 66 MHz | 75 MHz | 66 MHz | 66 MHz | 100 MHz | 100 MHz |
| Supported DRAM standards: | FPM, EDO | FPM, EDO, SDRAM | FPM, EDO, SDRAM | FPM, EDO, SDRAM | FPM, EDO, SDRAM | FPM, EDO, SDRAM | FPM, EDO, SDRAM |
| Maximum DRAM expansion: | 512 MB | 512 MB | 512 MB | 512 MB | 768 MB | 768 MB | 768 MB |
| AGP compatibility: | - | - | - | - | 1.0 (1 ×, 2 ×) | 1.0 (1 ×, 2 ×) | 2.0 (1 ×, 2 ×, 4 ×) |
| Southbridge connection: | - | PCI | PCI | PCI | PCI | PCI | PCI |