Advanced Programmable Interrupt Controller
The Advanced Programmable Interrupt Controller ( APIC for short , not to be confused with ACPI ) distributes interrupts in x86 and Itanium-based computer systems.
In contrast to the PIC , the APIC consists of two components, the
For the CPU families Pentium , Pentium Pro , Pentium II and Pentium III (generation P5 and P6) there is an additional APIC bus system that connects the individual APICs with one another. Since the Pentium 4 (generation NetBurst and Core ), the messages between the APICs have been exchanged via the normal platform-specific system bus.
In simplified terms, the system works in such a way that the I / O-APIC receives the interrupt requests from the devices in the system and distributes them as interrupt messages to the local APICs in the system's processors. The local APICs then in turn forward the highest priority interrupt to the CPU core. Once this has been processed, the local APIC forwards the next interrupt.
The APIC system was originally developed by Intel developed to the interrupt distribution in multi-processor systems to enable what with the existing XT-PIC was not feasible. In the meantime, more and more single processor systems are using the APIC system, as it eliminates other problems of the XT-PIC:
- More inputs for interrupt lines reduce the likelihood that multiple devices will have to share an interrupt
- More flexibility: each interrupt can be configured separately.
- Priorities of the interrupts can be set almost arbitrarily.
- Message-signaled interrupts are supported.
- Processors can send each other interrupts ( interprocessor interrupts ).
- Faster programming, especially of the Local APIC
Today, APIC is supported by all current operating systems, but it is also responsible for a number of errors, as the implementations are partially incorrect.