Direct digital synthesis
The direct digital synthesis or direct digital synthesis (short DDS ) is a process in the digital signal processing periodic for generating, band-limited signals with virtually any fine frequency resolution . In addition to the rationally broken phase-locked loop, the process is the dominant method for generating signals with a finely adjustable frequency and has found widespread use in communications and measurement technology .
In technical colloquial language, the term DDS also refers to integrated circuits (IC) that implement the complete hardware of a synthesizer using the DDS process. The widespread use of such ICs has contributed significantly to the success of the process.
function
The direct digital synthesis is based on a digital adder , combined with a register including feedback, which represents a memory for the phase position and is shown in the adjacent figure. The bit widths indicated in the figure are examples and illustrate the different word widths in the individual levels.
This so-called phase accumulator adds cyclically, per clock step, the input value supplied on the left, which sets the frequency in inverse proportion. The current count then corresponds to a phase angle, and an overflow of the phase accumulator (automatic return to zero) corresponds to a full cycle of the phase indicator of 2 · π.
The signal value associated with a specific phase value is formed by a further function which assigns a signal value to a phase value. If, for example, a sinusoidal (harmonic) signal curve is desired, this block represents the sinus function . With small bit widths in the digital circuit, the mapping can take place in the form of a ROM table calculated in advance . Alternatively, the output values for a sinusoidal signal curve can also be calculated in the circuit during runtime using algorithms such as the CORDIC algorithm. If only a sawtooth oscillation is required (for example for a synthesizer ), the phase value can be output directly as a signal value, since the phase increases linearly within each period and then jumps back to zero. A triangular wave , which can replace a sine for some applications, can be generated by interpreting the phase value as a signed binary number ( two's complement ) and calculating its absolute value.
The digital signal can then be fed to further stages for processing, for example for an analog output to the digital-to-analog converter shown on the right in the figure .
The frequency resolution that can be achieved with the method depends exclusively on the word length of the phase accumulator. A typical word width is 32 bits, so the frequency resolution at 100 MHz system clock is around 0.023 Hz with a maximum output frequency of theoretically half the clock frequency (50 MHz).
The quality of the output signal essentially depends on the quality of the clock generator, its lowest possible jitter and the accuracy of the digital-to-analog converter. The higher the frequency (= smaller divisor), the coarser the scanning of the table and the more important the filters connected downstream of the DA converter become. In practice, a compromise has to be made between bandwidth and accuracy. In the frequency range below 100 MHz, as of 2008, sinusoidal signals with spurious spacing of approx. 80 dB can be implemented. DDS circuits with an integrated D / A converter are available today with clock frequencies of up to approx. 1000 MHz (for example AD9912).
The DDS (without analog converter) can be implemented in an FPGA , DSP or ASIC . An angle modulation (phase noise) or amplitude modulation of the output signal can also be implemented through appropriate functional expansions of the DDS .
literature
- Bar-Giora Goldberg: Digital Frequency Synthesis Demystified - DDS and Fractional-N PLLs . LLH Technology Publishing, Eagle Rock VA 1999, ISBN 1-878707-47-7 .
- Analog Devices: A Technical Tutorial on Digital Signal Synthesis . 1999 ( (PDF; 902 kB) - company publication).
- Michael Gaedtke: Measuring with the sound card: function generator in DDS technology . 2006 ( online tutorial).
See also
Web links
- AD9833 data sheet (PDF; 703 kB), engl. A DDS with a bandwidth of 0 MHz to 12.5 MHz and the option of outputting sine, triangular or square waves.
- Direct digital synthesis , article on the function and implementation of a DDS with microcontrollers and FPGAs.