Rise Technology

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Rise Technology was founded in 1993 as a privately held company. The aim was to produce a competitive x86 processor with special energy-saving mechanisms, especially for notebooks.

This was achieved in 1998 with the Rise mP6 : The CPU had a triple pipelined design and a. 3 Execute MMX instructions / clock. The FPU was also a pipelined design, which resulted in high performance. Especially in comparison to the WinChip series from Centaur Technology and the 6x86MX / MII series from Cyrix , the Rise mP6 was able to impress with its very good performance.

The launch and availability of the Rise mP6 was repeatedly postponed so that it never really hit the market. The successors Rise mP6-II with integrated L2 cache (similar to AMD K6-III ) and Tiger S370 were never presented.

With the iDragon, Rise then shifted its focus from desktop CPUs to SoCs .

On October 12, 1999, SiS announced that it had licensed its CPU technology and other intellectual property from Rise. SiS then integrated the CPU technology into the SiS55x SoC family. The CPU part of this SoC largely corresponds to the Rise mP6. SiS sold the technology to DM&P, where it is used in the Vortex86 SoC family.

Also STMicroelectronics uses technology of Rise in its CP250 family (Vega). This also largely corresponds to the Rise mP6.

The technology of the mP6-II or even the Tiger S370 has so far not appeared in any other product.

Model data

mP6

Rise mP6 PR266
Rise mP6 PR333 Engineering Sample
  • Code name:
    • 6401 (0.25 µm, multiplier 2.0)
    • Kirin or 6441 (0.25 µm, multiplier 2.0 and 2.5)
    • Lynx or 6510 (0.18 µm)
  • Vendor ID string: RiseRiseRise
  • L1 cache: 8 + 8 KB (data + instructions)
  • MMX
  • Super Socket 7 (100 MHz FSB)
  • DualVoltage
  • Operating voltage (Vcore): 2.0 V (0.18 µm) and 2.8 V (0.25 µm)
  • Operating voltage (I / O): 3.3 V.
  • Particularities:
    • fast pipelined FPU
    • TriplePiplined design
  • Release DATE: October 1998
  • Manufacturing technology: 0.25 µm (later 0.18 µm) at TSMC
  • The size: 107 mm² (0.25 µm) with 3.6 million transistors
  • FSB : 75, 83, 95 and 100 MHz
  • Clock rates: 166 MHz to 250 MHz
    • PR266: 200 MHz (100 MHz FSB)
    • PR150: 150 MHz (75 MHz FSB), as a sample only
    • PR166: 166 MHz (83.3 MHz FSB), as a sample only
    • PR233: 190 MHz (95 MHz FSB), as a sample only
    • PR333: 237.5 MHz (95 MHz FSB), as a sample only
    • PR366: 250 MHz (100 MHz FSB), as a sample only

mP6-II

  • Code name:
  • L1 cache: 8 + 8 KB (data + instructions)
  • L2 cache: 256 KB at full speed
  • MMX
  • Super Socket 7 (100 MHz FSB)
  • DualVoltage
  • Particularities:
    • fast pipelined FPU
    • TriplePiplined design
  • Publication date: never published
  • Manufacturing technology: 0.25 µm, later 0.18 µm
  • The size: 105 mm² with 18 million transistors
  • Clock rates: 250 MHz to 350 MHz
    • 366: 250 MHz
    • 380: 285 MHz
    • 400: 300 MHz
    • 466: 350 MHz

Tiger S370

  • Code name:
  • L1 cache: 8 + 8 KB (data + instructions)
  • L2 cache: 256 KB with processor clock
  • MMX
  • Base 370
  • DualVoltage (1.8 V Core / 2.5 VI / O)
  • Particularities:
    • fast pipelined FPU
    • TriplePiplined design
  • Publication date: never published
  • Manufacturing engineering: -
  • Producer: -
  • Clock rates:

See also

Web links

Commons : Rise Microprocessors  - Collection of Images, Videos and Audio Files