Goldmont: Difference between revisions
mNo edit summary |
|||
(46 intermediate revisions by 41 users not shown) | |||
Line 1: | Line 1: | ||
{{short description|CPU microarchitecture used in Intel SoCs}} |
|||
{{Infobox CPU |
{{Infobox CPU |
||
| name = Goldmont |
| name = Goldmont |
||
Line 13: | Line 14: | ||
| dmi = |
| dmi = |
||
| gpu = |
| gpu = |
||
| |
| instructions = [[x86-64]], [[Intel 64]] |
||
| |
| extensions = [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], [[SSE4.1]], [[SSE4.2]] |
||
| extensions1 = [[AES instruction set|AES-NI]], [[RDRAND]], [[CLMUL instruction set|CLMUL]], [[Intel SHA extensions|SHA]] |
|||
| extensions = [[x86-64]], [[Intel 64]] |
|||
| extensions2 = [[Intel VT-x|VT-x]], [[VT-d]] |
|||
| extensions1 = [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], [[SSE4.1]], [[SSE4.2]], [[Intel_SHA_extensions|SHA]] |
|||
| extensions2 = [[Intel VT-x|VT-x]] |
|||
| socket = |
| socket = |
||
| predecessor = [[Airmont microarchitecture|Airmont]] ([[die shrink]]) |
| predecessor = [[Airmont microarchitecture|Airmont]] ([[die shrink]]) |
||
Line 28: | Line 28: | ||
'''Goldmont''' is a [[microarchitecture]] for low-power [[Atom (system on chip)|Atom]], [[Celeron]] and [[Pentium]] branded processors used in [[system on a chip|systems on a chip]] (SoCs) made by [[Intel]]. They allow only one [[thread (computing)|thread]] per [[multi-core|core]]. |
'''Goldmont''' is a [[microarchitecture]] for low-power [[Atom (system on chip)|Atom]], [[Celeron]] and [[Pentium]] branded processors used in [[system on a chip|systems on a chip]] (SoCs) made by [[Intel]]. They allow only one [[thread (computing)|thread]] per [[multi-core|core]]. |
||
The ''Apollo Lake'' platform with 14 nm Goldmont core was unveiled at the [[Intel Developer Forum]] (IDF) in Shenzhen, China, April 2016.<ref name=hackerboards201604>{{cite web |url=http://hackerboards.com/apollo-lake-atoms-to-offer-graphics-rich-goldmont-cores/ |title="Apollo Lake" Atoms to offer graphics-rich Goldmont cores |author=Eric Brown |publisher=Hackerboards.com |date=2016-04-18 | |
The ''Apollo Lake'' platform with 14 nm Goldmont core was unveiled at the [[Intel Developer Forum]] (IDF) in Shenzhen, China, April 2016.<ref name=hackerboards201604>{{cite web |url=http://hackerboards.com/apollo-lake-atoms-to-offer-graphics-rich-goldmont-cores/ |title="Apollo Lake" Atoms to offer graphics-rich Goldmont cores |author=Eric Brown |publisher=Hackerboards.com |date=2016-04-18 |access-date=2016-06-11 |archive-url=https://web.archive.org/web/20160620170203/http://hackerboards.com/apollo-lake-atoms-to-offer-graphics-rich-goldmont-cores/ |archive-date=2016-06-20 |url-status=dead }}</ref> The Goldmont architecture borrows heavily from the [[Skylake (microarchitecture)|Skylake]] Core processors, so it offers a more than 30 percent performance boost compared to the previous [[Braswell (SOC)|Braswell]] platform, and it can be used to implement power-efficient low-end devices including Cloudbooks, 2-in-1 netbooks, small PCs, IP cameras, and [[in-car entertainment]] systems.<ref name=anandtech201604>{{cite web|url=http://www.anandtech.com/show/10256/intel-unveils-apollo-lake-14nm-goldmont |title=Intel Unveils New Low-Cost PC Platform: Apollo Lake with 14nm Goldmont Cores|author=Anton Shilov |publisher=Anandtech.com |date=2016-04-15|access-date=2016-06-11}}</ref><ref name=notebookcheck201604>{{cite web|url=http://www.notebookcheck.net/Intel-claims-Apollo-Lake-will-be-30-percent-faster-than-Braswell.167380.0.html |title= Intel claims Apollo Lake will be 30 percent faster than Braswell|author=Alexander Fagot/ Allen Ngo |publisher=Notebookcheck.net |date=2016-06-07|access-date=2016-06-11}}</ref> |
||
==Design== |
==Design== |
||
Goldmont is the 2nd generation [[out-of-order execution|out-of-order]] low-power [[Atom (system on chip)|Atom]] microarchitecture designed for the entry level desktop and notebook computers.<ref name="kitguru201506">{{cite web|url=http://www.kitguru.net/components/cpu/anton-shilov/intel-readies-apollo-lake-cpus-with-goldmont-architecture-gen9-graphics/|title=Intel preps |
Goldmont is the 2nd generation [[out-of-order execution|out-of-order]] low-power [[Atom (system on chip)|Atom]] microarchitecture designed for the entry level desktop and notebook computers.<ref name="kitguru201506">{{cite web|url=http://www.kitguru.net/components/cpu/anton-shilov/intel-readies-apollo-lake-cpus-with-goldmont-architecture-gen9-graphics/|title=Intel preps 'Apollo Lake' CPUs with 'Goldmont' cores, Gen9 graphics|author=Anton Shilov|date= 2015-06-10|access-date= 2016-06-11}}</ref> Goldmont is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the [[Intel HD and Iris Graphics|Intel Gen9]] graphics architecture introduced with the [[Skylake (microarchitecture)|Skylake]]. |
||
The Goldmont microarchitecture builds on the success of the Silvermont microarchitecture, and provides the following enhancements: |
The Goldmont microarchitecture builds on the success of the Silvermont microarchitecture, and provides the following enhancements: |
||
* An out-of-order execution engine with a 3-wide [[superscalar]] pipeline.<ref>{{cite web|last1=Kanter|first1=David|title=Goldmont Takes Atom to 14nm|url=http://www.linleygroup.com/newsletters/newsletter_detail.php?num=5665|website=The Linley Group|publisher=The Linley Group| |
* An out-of-order execution engine with a 3-wide [[superscalar]] pipeline.<ref>{{cite web|last1=Kanter|first1=David|title=Goldmont Takes Atom to 14nm|url=http://www.linleygroup.com/newsletters/newsletter_detail.php?num=5665|website=The Linley Group|publisher=The Linley Group|access-date=17 August 2017}}</ref> Specifically: |
||
** The decoder can decode 3 instructions per cycle. |
** The decoder can decode 3 instructions per cycle. |
||
** The microcode sequencer can send 3 µops per cycle for allocation into the reservation stations. |
** The microcode sequencer can send 3 µops per cycle for allocation into the reservation stations. |
||
Line 53: | Line 53: | ||
* A [[14 nanometer|14 nm]] manufacturing process |
* A [[14 nanometer|14 nm]] manufacturing process |
||
* |
* [[System on chip]] architecture |
||
* 3D [[Trigate transistors|tri-gate transistor]]s |
* 3D [[Trigate transistors|tri-gate transistor]]s |
||
* Consumer chips up to quad-cores |
* Consumer chips up to quad-cores |
||
Line 61: | Line 61: | ||
* Supports [[Intel SHA extensions]] |
* Supports [[Intel SHA extensions]] |
||
* Supports [[Intel MPX]] (Memory Protection Extensions) |
* Supports [[Intel MPX]] (Memory Protection Extensions) |
||
* Gen 9 [[Intel HD Graphics]] with [[DirectX 12]], [[OpenGL|OpenGL 4.6]] with latest Windows 10 driver update<ref>https://downloadmirror.intel.com/ |
* Gen 9 [[Intel HD Graphics]] with [[DirectX 12]], [[OpenGL|OpenGL 4.6]] with latest Windows 10 driver update<ref>{{cite web|url=https://downloadmirror.intel.com/764512/ReleaseNotes_101.2115_WHQL.pdf|format=PDF|title=Release Notes : DRIVER VERSION: 31.0.101.2115|website=Downloadmirror.intel.com|access-date=29 December 2022}}</ref> (OpenGL 4.5 on Linux<ref>{{cite web|url=http://www.phoronix.com/scan.php?page=article&item=mesa-13|title=Mesa 13.0 Released With Intel OpenGL 4.5, RADV Radeon Vulkan Driver - Phoronix|website=Phoronix.com}}</ref>), [[OpenGL ES|OpenGL ES 3.2]] and [[OpenCL|OpenCL 2.0]] support. |
||
* HEVC Main10 & VP9 Profile0 hardware decoding support |
* HEVC Main10 & VP9 Profile0 hardware decoding support |
||
* 10 W [[thermal design power]] (TDP) Desktop or Server processors |
* 10 W [[thermal design power]] (TDP) Desktop or Server processors |
||
Line 74: | Line 74: | ||
== Erratum == |
== Erratum == |
||
Similar to previous Silvermont generation design flaws were found in processor circuitry resulting in cease of operation when processors are actively used for several years. |
Similar to the previous Silvermont generation, design flaws were found in processor circuitry, resulting in cease of operation when processors are actively used for several years. An Erratum named APL46 "System May Experience Inability to Boot or May Cease Operation"<ref>{{Cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/pentium-celeron-n-series-j-series-datasheet-spec-update.pdf|title=Intel® Pentium® and Celeron® Processor N- and J- Series Specification Update|access-date=2018-04-13}}</ref> was added to documentation in June 2017, stating that low pin count (LPC), real time clock (RTC), SD card and GPIO interfaces may stop functioning. |
||
Mitigations<ref>{{Cite web|url=https://www.congatec.com/fileadmin/user_upload/Documents/Technical_Documents/APL_xA50_Errata_LPC_USB_SD_Card_eMMC_Hot_Plug.pdf|title=Errata sheet - congatec Apollo Lake designs|date=2017-07-26|website=congatec|access-date=2018-04-15|archive-url=https://web.archive.org/web/20180415190524/https://www.congatec.com/fileadmin/user_upload/Documents/Technical_Documents/APL_xA50_Errata_LPC_USB_SD_Card_eMMC_Hot_Plug.pdf|archive-date=2018-04-15|url-status=dead}}</ref> were found to limit impact on systems. |
Mitigations<ref>{{Cite web|url=https://www.congatec.com/fileadmin/user_upload/Documents/Technical_Documents/APL_xA50_Errata_LPC_USB_SD_Card_eMMC_Hot_Plug.pdf|title=Errata sheet - congatec Apollo Lake designs|date=2017-07-26|website=congatec|access-date=2018-04-15|archive-url=https://web.archive.org/web/20180415190524/https://www.congatec.com/fileadmin/user_upload/Documents/Technical_Documents/APL_xA50_Errata_LPC_USB_SD_Card_eMMC_Hot_Plug.pdf|archive-date=2018-04-15|url-status=dead}}</ref> were found to limit impact on systems. A firmware update for the LPC bus called LPC_CLKRUN# reduces the utilization of the LPC interface, which in turn decreases (but does not eliminate) LPC bus degradation – some systems are however not compatible with this new firmware. It is recommended not to use SD cards as boot devices, and to remove the card from the system when not in use; other possible solutions being using only UHS-I cards and operating them at 1.8 V. |
||
Congatec also states the issues |
Congatec also states the issues impacts USB buses and eMMC, although those are not mentioned in Intel's public documentation. USB should have a maximum of 12% active time and there is a 60TB transmit traffic life expectancy over the lifetime of the port. eMMC should have a maximum of 33% active time and should be set to D3 device low power state by the operating system when not in use. Newer designs such as Atom C3000 Denverton do not seem to be affected.<ref>{{Cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/atom-c3000-family-spec-update.pdf|title=Intel® Atom® Processor C3000 Product Family Specification Update|access-date=2018-04-13}}</ref> |
||
Newer designs such as Atom C3000 Denverton do not seem to be affected.<ref>{{Cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/atom-c3000-family-spec-update.pdf|title=Intel® Atom® Processor C3000 Product Family Specification Update|access-date=2018-04-13}}</ref> |
|||
==List of Goldmont processors== |
==List of Goldmont processors== |
||
===Desktop processors |
===Desktop processors (Apollo Lake) === |
||
List of desktop processors as follows:<ref name=notebookcheck201604/><ref name=cpuworld201606>{{cite web|url=http://www.cpu-world.com/news_2016/2016060901_Model_numbers_of_Apollo_Lake_processors_revealed.html|title= Model numbers of Apollo Lake processors revealed|author=Gennadiy Shvets |publisher=cpu-world.com|date=2016-06-09| |
List of desktop processors as follows:<ref name=notebookcheck201604/><ref name=cpuworld201606>{{cite web|url=http://www.cpu-world.com/news_2016/2016060901_Model_numbers_of_Apollo_Lake_processors_revealed.html|title= Model numbers of Apollo Lake processors revealed|author=Gennadiy Shvets |publisher=cpu-world.com|date=2016-06-09|access-date=2016-06-11}}</ref> |
||
{| class="wikitable" |
{| class="wikitable" |
||
|- |
|- |
||
!rowspan=2 | Target<br>segment |
!rowspan=2 | Target<br />segment |
||
!rowspan=2 | [[Multi-core|Core]]s<br>([[Thread (computing)| |
!rowspan=2 | [[Multi-core|Core]]s<br />([[Thread (computing)|thread]]s = cores) |
||
!colspan=2 rowspan="2" | Processor<br> |
!colspan=2 rowspan="2" | Processor<br />branding & model |
||
!colspan |
! colspan="2" | GPU model |
||
!rowspan=2 | TDP |
!rowspan=2 | TDP |
||
(W) |
|||
! colspan=2 | CPU [[Clock rate]] |
|||
!colspan=2 | |
! colspan=2 | CPU freq. |
||
(GHz) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br>Cache]] |
|||
! |
!colspan=2 | GPU freq. |
||
(MHz) |
|||
!rowspan=2 | Price<br>(USD) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br />cache]] |
|||
!rowspan=2 | Release<br />date |
|||
!rowspan=2 | Price<br />(USD) |
|||
|- |
|- |
||
!Brand name &<br />model number |
|||
!EU |
|||
! Base |
! Base |
||
! Turbo |
! Turbo |
||
! |
! Base |
||
! Turbo |
! Turbo |
||
|- |
|- |
||
Line 109: | Line 112: | ||
| rowspan="1" | Pentium |
| rowspan="1" | Pentium |
||
| [http://ark.intel.com/products/95591/Intel-Pentium-Processor-J4205-2M-Cache-up-to-2_6-GHz J4205] |
| [http://ark.intel.com/products/95591/Intel-Pentium-Processor-J4205-2M-Cache-up-to-2_6-GHz J4205] |
||
| rowspan="1" | [[Intel HD and Iris Graphics| |
| rowspan="1" | [[Intel HD and Iris Graphics|HD Graphics 505]] |
||
| rowspan="1" | |
| rowspan="1" | 18 |
||
| rowspan="3" | 10 |
| rowspan="3" | 10 |
||
| rowspan="2" |1.5 |
| rowspan="2" |1.5 |
||
| rowspan="1" | 2.6 |
| rowspan="1" | 2.6 |
||
| rowspan="3" | 250 |
| rowspan="3" | 250 |
||
| rowspan="1" | 800 |
| rowspan="1" | 800 |
||
| rowspan="3" | 2 MB |
| rowspan="3" | 2 MB |
||
| rowspan="3" | Q3 2016 |
| rowspan="3" | Q3 2016 |
||
Line 122: | Line 125: | ||
| rowspan="2" | Celeron |
| rowspan="2" | Celeron |
||
| [http://ark.intel.com/products/95594/Intel-Celeron-Processor-J3455-2M-Cache-up-to-2_3-GHz J3455] |
| [http://ark.intel.com/products/95594/Intel-Celeron-Processor-J3455-2M-Cache-up-to-2_3-GHz J3455] |
||
| rowspan="2" | [[Intel HD and Iris Graphics| |
| rowspan="2" | [[Intel HD and Iris Graphics|HD Graphics 500]] |
||
| rowspan="2" | |
| rowspan="2" | 12 |
||
| rowspan="1" | 2.3 |
| rowspan="1" | 2.3 |
||
| rowspan="1" | 750 |
| rowspan="1" | 750 |
||
| rowspan="2" | $107 |
| rowspan="2" | $107 |
||
|- |
|- |
||
| rowspan="1" | 2 (2) |
| rowspan="1" | 2 (2) |
||
|[http://ark.intel.com/products/95597/Intel-Celeron-Processor-J3355-2M-Cache-up-to-2_5-GHz J3355] |
|[http://ark.intel.com/products/95597/Intel-Celeron-Processor-J3355-2M-Cache-up-to-2_5-GHz J3355] |
||
| 2.0 |
| 2.0 |
||
| rowspan="1" | 2.5 |
| rowspan="1" | 2.5 |
||
| rowspan="1" | 700 |
| rowspan="1" | 700 |
||
|} |
|} |
||
===Server processors |
===Server processors (Denverton) === |
||
{| class="wikitable sortable" |
{| class="wikitable sortable" |
||
|- |
|- |
||
!rowspan=2 | Target<br>segment |
!rowspan=2 | Target<br />segment |
||
!rowspan=2 | Cores |
!rowspan=2 | Cores |
||
(threads) |
|||
!colspan=2 rowspan="2" | Processor<br> |
!colspan=2 rowspan="2" | Processor<br />branding & model |
||
!rowspan=2 | TDP |
!rowspan=2 | TDP |
||
(W) |
|||
! colspan=2 | CPU [[Clock rate]] |
|||
! colspan=2 | CPU freq. |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br>Cache]] |
|||
(GHz) |
|||
!rowspan=2 | [[DDR4 SDRAM|DDR4 Speed]] |
|||
!rowspan=2 | |
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br />cache]] |
||
!rowspan=2 | |
!rowspan=2 | [[DDR4 SDRAM|DDR4 speed]] |
||
!rowspan=2 | Release<br />date |
|||
!rowspan=2 | Price<br />(USD) |
|||
|- |
|- |
||
! Base |
! Base |
||
Line 155: | Line 161: | ||
| 16 (16) |
| 16 (16) |
||
| rowspan="15" | Atom |
| rowspan="15" | Atom |
||
| [https://ark.intel.com/products/97927/Intel-Atom-Processor-C3958-16M-Cache-up-to-2_0-GHz C3958]<ref name='sth_denverton' /><ref>{{cite news|last1=Cutress|first1=Ian|title=More Denverton Noise: Gigabyte's MA1-ST0 Features Unannounced 16-Core C3958|url=http://www.anandtech.com/show/11720/more-denverton-noise-gigabytes-ma10st0-features-unannounced-16core-c3958| |
| [https://ark.intel.com/products/97927/Intel-Atom-Processor-C3958-16M-Cache-up-to-2_0-GHz C3958]<ref name='sth_denverton' /><ref>{{cite news|last1=Cutress|first1=Ian|title=More Denverton Noise: Gigabyte's MA1-ST0 Features Unannounced 16-Core C3958|url=http://www.anandtech.com/show/11720/more-denverton-noise-gigabytes-ma10st0-features-unannounced-16core-c3958|access-date=15 August 2017|publisher=Anandtech|date=15 August 2017}}</ref> |
||
| 31 |
| 31 |
||
| colspan="2" | 2.0 |
|||
| 2.0 GHz |
|||
| rowspan="2" | 16 MB |
|||
| 2.0 GHz |
|||
| rowspan="4" | 2400 |
|||
| 16 MB |
|||
| rowspan="12" | Q3 2017 |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $449 |
| $449 |
||
|- |
|- |
||
| 16 (16) |
| 16 (16) |
||
| [https://ark.intel.com/products/97933/Intel-Atom-Processor-C3955-16M-Cache-up-to-2_40-GHz C3955]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97933/Intel-Atom-Processor-C3955-16M-Cache-up-to-2_40-GHz C3955]<ref name='sth_denverton' /> |
||
| 32 |
| 32 |
||
| 2.1 |
| 2.1 |
||
| 2.4 |
| 2.4 |
||
| 16 MB |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $434 |
| $434 |
||
|- |
|- |
||
| 12 (12) |
| 12 (12) |
||
| [https://ark.intel.com/products/97936/Intel-Atom-Processor-C3858-12M-Cache-up-to-2_0-GHz C3858]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97936/Intel-Atom-Processor-C3858-12M-Cache-up-to-2_0-GHz C3858]<ref name='sth_denverton' /> |
||
| rowspan="2" | 25 |
|||
| 25 W |
|||
| colspan="2" | 2.0 |
|||
| 2.0 GHz |
|||
| rowspan="4" | 12 MB |
|||
| 2.0 GHz |
|||
| 12 MB |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $332 |
| $332 |
||
|- |
|- |
||
| 12 (12) |
| 12 (12) |
||
| [https://ark.intel.com/products/97932/Intel-Atom-Processor-C3850-12M-Cache-up-to-2_40-GHz C3850]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97932/Intel-Atom-Processor-C3850-12M-Cache-up-to-2_40-GHz C3850]<ref name='sth_denverton' /> |
||
| 2.1 |
|||
| 25 W |
|||
| 2. |
| 2.4 |
||
| 2.4 GHz |
|||
| 12 MB |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $323 |
| $323 |
||
|- |
|- |
||
| 12 (12) |
| 12 (12) |
||
| [https://ark.intel.com/products/97931/Intel-Atom-Processor-C3830-12M-Cache-up-to-2_30-GHz C3830]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97931/Intel-Atom-Processor-C3830-12M-Cache-up-to-2_30-GHz C3830]<ref name='sth_denverton' /> |
||
| 21 |
| 21 |
||
| 1.9 |
| 1.9 |
||
| 2.3 |
| 2.3 |
||
| rowspan="2" | 2133 |
|||
| 12 MB |
|||
| 2133 |
|||
| Q3 2017 |
|||
| $289 |
| $289 |
||
|- |
|- |
||
| 12 (12) |
| 12 (12) |
||
| [https://ark.intel.com/products/97939/Intel-Atom-Processor-C3808-12M-Cache-up-to-2_0-GHz C3808]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97939/Intel-Atom-Processor-C3808-12M-Cache-up-to-2_0-GHz C3808]<ref name='sth_denverton' /> |
||
| rowspan="2" | 25 |
|||
| 25 W |
|||
| colspan="2" | 2.0 |
|||
| 2.0 GHz |
|||
| 2.0 GHz |
|||
| 12 MB |
|||
| 2133 |
|||
| Q3 2017 |
|||
| $369 |
| $369 |
||
|- |
|- |
||
| 8 (8) |
| 8 (8) |
||
| [https://ark.intel.com/products/97926/Intel-Atom-Processor-C3758-16M-Cache-up-to-2_20-GHz C3758]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97926/Intel-Atom-Processor-C3758-16M-Cache-up-to-2_20-GHz C3758]<ref name='sth_denverton' /> |
||
| colspan="2" | 2.2 |
|||
| 25 W |
|||
| rowspan="3" | 16 MB |
|||
| 2.2 GHz |
|||
| rowspan="2" | 2400 |
|||
| 2.2 GHz |
|||
| 16 MB |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $193 |
| $193 |
||
|- |
|- |
||
| 8 (8) |
| 8 (8) |
||
| [https://ark.intel.com/products/97938/Intel-Atom-Processor-C3750-16M-Cache-up-to-2_40-GHz C3750]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97938/Intel-Atom-Processor-C3750-16M-Cache-up-to-2_40-GHz C3750]<ref name='sth_denverton' /> |
||
| 21 |
| 21 |
||
| 2.2 |
| 2.2 |
||
| 2.4 |
| 2.4 |
||
| 16 MB |
|||
| 2400 |
|||
| Q3 2017 |
|||
| $171 |
| $171 |
||
|- |
|- |
||
| 8 (8) |
| 8 (8) |
||
| [https://ark.intel.com/products/97934/Intel-Atom-Processor-C3708-16M-Cache-up-to-1_70-GHz C3708]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97934/Intel-Atom-Processor-C3708-16M-Cache-up-to-1_70-GHz C3708]<ref name='sth_denverton' /> |
||
| 17 |
| 17 |
||
| colspan="2" | 1.7 |
|||
| 1.7 GHz |
|||
| rowspan="3" | 2133 |
|||
| 1.7 GHz |
|||
| 16 MB |
|||
| 2133 |
|||
| Q3 2017 |
|||
| $209 |
| $209 |
||
|- |
|- |
||
| 4 (4) |
| 4 (4) |
||
| [https://ark.intel.com/products/97937/Intel-Atom-Processor-C3558-8M-Cache-up-to-2_20-GHz C3558]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97937/Intel-Atom-Processor-C3558-8M-Cache-up-to-2_20-GHz C3558]<ref name='sth_denverton' /> |
||
| 16 |
| 16 |
||
| colspan="2" | 2.2 |
|||
| 2.2 GHz |
|||
| rowspan="3" | 8 MB |
|||
| 2.2 GHz |
|||
| 8 MB |
|||
| 2133 |
|||
| Q3 2017 |
|||
| $86 |
| $86 |
||
|- |
|- |
||
| 4 (4) |
| 4 (4) |
||
| [https://ark.intel.com/products/97929/Intel-Atom-Processor-C3538-8M-Cache-up-to-2_10-GHz C3538]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97929/Intel-Atom-Processor-C3538-8M-Cache-up-to-2_10-GHz C3538]<ref name='sth_denverton' /> |
||
| 15 |
| 15 |
||
| colspan="2" | 2.1 |
|||
| 2.1 GHz |
|||
| 2.1 GHz |
|||
| 8 MB |
|||
| 2133 |
|||
| Q3 2017 |
|||
| $75 |
| $75 |
||
|- |
|- |
||
| 4 (4) |
| 4 (4) |
||
| [https://ark.intel.com/products/97930/Intel-Atom-Processor-C3508-8M-Cache-up-to-1_60-GHz C3508]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97930/Intel-Atom-Processor-C3508-8M-Cache-up-to-1_60-GHz C3508]<ref name='sth_denverton' /> |
||
| 11.25 |
| 11.25 |
||
| colspan="2" | 1.6 |
|||
| 1.6 GHz |
|||
| rowspan="3" | 1866 |
|||
| 1.6 GHz |
|||
| 8 MB |
|||
| 1866 |
|||
| Q3 2017 |
|||
| $86 |
| $86 |
||
|- |
|- |
||
| 2 (2) |
| 2 (2) |
||
| [https://ark.intel.com/products/97928/Intel-Atom-Processor-C3338-4M-Cache-up-to-2_20 C3338]<ref name='sth_denverton' /> |
| [https://ark.intel.com/products/97928/Intel-Atom-Processor-C3338-4M-Cache-up-to-2_20 C3338]<ref name='sth_denverton' /> |
||
| 9 |
| 9 |
||
| 1.5 |
| 1.5 |
||
| 2.2 |
| 2.2 |
||
| 4 MB |
| rowspan="2" | 4 MB |
||
| 1866 |
|||
| Q1 2017 |
| Q1 2017 |
||
| $27 |
| $27 |
||
|- |
|- |
||
| 2 (2) |
| 2 (2) |
||
| [https://ark.intel.com/products/97935/Intel-Atom-Processor-C3308-4M-Cache-up-to-2_10-GHz C3308]<ref name='sth_denverton'>{{cite news|last1=Kennedy|first1=Patrick|title=Intel Atom C3000 Series Launch SKUs and Differentiation|url=https://www.servethehome.com/intel-atom-c3000-series-launch-skus-differentiation/| |
| [https://ark.intel.com/products/97935/Intel-Atom-Processor-C3308-4M-Cache-up-to-2_10-GHz C3308]<ref name='sth_denverton'>{{cite news|last1=Kennedy|first1=Patrick|title=Intel Atom C3000 Series Launch SKUs and Differentiation|url=https://www.servethehome.com/intel-atom-c3000-series-launch-skus-differentiation/|access-date=15 August 2017|publisher=Serve the Home|date=15 August 2017}}</ref> |
||
| 9.5 |
| 9.5 |
||
| 1.6 |
| 1.6 |
||
| 2.1 |
| 2.1 |
||
| 4 MB |
|||
| 1866 |
|||
| Q3 2017 |
| Q3 2017 |
||
| $32 |
| $32 |
||
|} |
|} |
||
===Mobile processors |
===Mobile processors (Apollo Lake) === |
||
List of mobile processors as follows:<ref name=notebookcheck201604/><ref name=cpuworld201606/> |
List of mobile processors as follows:<ref name=notebookcheck201604/><ref name=cpuworld201606/> |
||
{| class="wikitable" |
{| class="wikitable" |
||
|- |
|- |
||
!rowspan=2 | Target<br>segment |
!rowspan=2 | Target<br />segment |
||
!rowspan=2 | Cores<br>(Threads) |
!rowspan=2 | Cores<br />(Threads) |
||
!colspan=2 rowspan="2" | Processor<br> |
!colspan=2 rowspan="2" | Processor<br />branding & model |
||
!colspan=2 |
! colspan="2" | GPU model |
||
!rowspan=2 | TDP |
!rowspan=2 | TDP |
||
(W) |
|||
!colspan=2 | CPU [[Clock rate]] |
|||
!colspan=2 | |
!colspan=2 | CPU freq. |
||
(GHz) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br>Cache]] |
|||
! |
!colspan=2 | GPU freq. |
||
(MHz) |
|||
!rowspan=2 | Price<br>(USD) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br />cache]] |
|||
!rowspan=2 | Release<br />date |
|||
!rowspan=2 | Price<br />(USD) |
|||
|- |
|- |
||
!Brand name &<br />model number |
|||
!EU |
|||
! Base |
! Base |
||
! Turbo |
! Turbo |
||
! |
! Base |
||
! Turbo |
! Turbo |
||
|- |
|- |
||
Line 319: | Line 291: | ||
| rowspan="1" | Pentium |
| rowspan="1" | Pentium |
||
| [http://ark.intel.com/products/95592/Intel-Pentium-Processor-N4200-2M-Cache-up-to-2_5-GHz N4200] |
| [http://ark.intel.com/products/95592/Intel-Pentium-Processor-N4200-2M-Cache-up-to-2_5-GHz N4200] |
||
| rowspan="1" | [[Intel HD and Iris Graphics| |
| rowspan="1" | [[Intel HD and Iris Graphics|HD Graphics 505]] |
||
| rowspan="1" | |
| rowspan="1" | 18 |
||
| rowspan="3" | 6 |
| rowspan="3" | 6 |
||
| rowspan="3"| 1.1 |
| rowspan="3"| 1.1 |
||
| rowspan="1" | 2.5 |
| rowspan="1" | 2.5 |
||
| rowspan="3" | 200 |
| rowspan="3" | 200 |
||
| rowspan="1" | 750 |
| rowspan="1" | 750 |
||
| rowspan="3" | 2 MB |
| rowspan="3" | 2 MB |
||
| rowspan="3" | Q3 2016 |
| rowspan="3" | Q3 2016 |
||
Line 332: | Line 304: | ||
| rowspan="2" | Celeron |
| rowspan="2" | Celeron |
||
| [http://ark.intel.com/products/95596/Intel-Celeron-Processor-N3450-2M-Cache-up-to-2_2-GHz N3450] |
| [http://ark.intel.com/products/95596/Intel-Celeron-Processor-N3450-2M-Cache-up-to-2_2-GHz N3450] |
||
| rowspan="2" | [[Intel HD and Iris Graphics| |
| rowspan="2" | [[Intel HD and Iris Graphics|HD Graphics 500]] |
||
| rowspan="2" | |
| rowspan="2" | 12 |
||
| rowspan="1" | 2.2 |
| rowspan="1" | 2.2 |
||
| rowspan="1" | 700 |
| rowspan="1" | 700 |
||
| rowspan="2" | $107 |
| rowspan="2" | $107 |
||
|- |
|- |
||
| rowspan="1" | 2 (2) |
| rowspan="1" | 2 (2) |
||
| [http://ark.intel.com/products/95598/Intel-Celeron-Processor-N3350-2M-Cache-up-to-2_4-GHz N3350] |
| [http://ark.intel.com/products/95598/Intel-Celeron-Processor-N3350-2M-Cache-up-to-2_4-GHz N3350] |
||
| rowspan="1" | 2.4 |
| rowspan="1" | 2.4 |
||
| rowspan="1" | 650 |
| rowspan="1" | 650 |
||
|} |
|} |
||
===Embedded processors |
===Embedded processors (Apollo Lake) === |
||
List of embedded processors as follows: |
List of embedded processors as follows: |
||
{| class="wikitable" |
{| class="wikitable" |
||
|- |
|- |
||
!rowspan=2 | Target<br>segment |
!rowspan=2 | Target<br />segment |
||
!rowspan=2 | Cores<br>( |
!rowspan=2 | Cores<br />(threads) |
||
!colspan=2 rowspan="2" | Processor<br> |
!colspan=2 rowspan="2" | Processor<br />branding & model |
||
!colspan=2 |
! colspan="2" | GPU model |
||
!rowspan=2 | TDP |
!rowspan=2 | TDP |
||
(W) |
|||
!colspan=2 | CPU [[Clock rate]] |
|||
!colspan=2 | |
!colspan=2 | CPU freq. |
||
(GHz) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br>Cache]] |
|||
! |
!colspan=2 | GPU freq. |
||
(MHz) |
|||
!rowspan=2 | Price<br>(USD) |
|||
!rowspan=2 | [[CPU cache#Multi-level caches|L2<br />cache]] |
|||
!rowspan=2 | Release<br />date |
|||
!rowspan=2 | Price<br />(USD) |
|||
|- |
|- |
||
!Brand name &<br />model number |
|||
!EU |
|||
! Base |
! Base |
||
! Turbo |
! Turbo |
||
! |
! Base |
||
! Turbo |
! Turbo |
||
|- |
|- |
||
Line 368: | Line 345: | ||
| rowspan="1" | Atom x7 |
| rowspan="1" | Atom x7 |
||
| rowspan="1" | [http://ark.intel.com/products/96488/Intel-Atom-x7-E3950-Processor-2M-Cache-up-to-2_00-GHz E3950] |
| rowspan="1" | [http://ark.intel.com/products/96488/Intel-Atom-x7-E3950-Processor-2M-Cache-up-to-2_00-GHz E3950] |
||
| rowspan="1" | [[Intel HD and Iris Graphics| |
| rowspan="1" | [[Intel HD and Iris Graphics|HD Graphics 505]] |
||
| rowspan="1" | |
| rowspan="1" | 18 |
||
| rowspan="1" | 12 |
| rowspan="1" | 12 |
||
| rowspan="2"| 1.6 |
| rowspan="2"| 1.6 |
||
| rowspan="1" | 2.0 |
| rowspan="1" | 2.0 |
||
| rowspan="1" | 500 |
| rowspan="1" | 500 |
||
| rowspan="1" | 650 |
| rowspan="1" | 650 |
||
| rowspan="3" | 2 MB |
| rowspan="3" | 2 MB |
||
| rowspan="3" | Q3 2016 |
| rowspan="3" | Q3 2016 |
||
| rowspan='3'| |
| rowspan='3'|? |
||
|- |
|- |
||
| rowspan="2" | Atom x5 |
| rowspan="2" | Atom x5 |
||
| rowspan="1" | [http://ark.intel.com/products/96485/Intel-Atom-x5-E3940-Processor-2M-Cache-up-to-1_80-GHz E3940] |
| rowspan="1" | [http://ark.intel.com/products/96485/Intel-Atom-x5-E3940-Processor-2M-Cache-up-to-1_80-GHz E3940] |
||
| rowspan="2" | [[Intel HD and Iris Graphics| |
| rowspan="2" | [[Intel HD and Iris Graphics|HD Graphics 500]] |
||
| rowspan="2" | |
| rowspan="2" | 12 |
||
| rowspan="1" | 9.5 |
| rowspan="1" | 9.5 |
||
| rowspan="2" | 1.8 |
| rowspan="2" | 1.8 |
||
| rowspan="2" | 400 |
| rowspan="2" | 400 |
||
| rowspan="1" | 600 |
| rowspan="1" | 600 |
||
|- |
|- |
||
| rowspan="1" | 2 (2) |
| rowspan="1" | 2 (2) |
||
| rowspan="1" | [http://ark.intel.com/products/96486/Intel-Atom-x5-E3930-Processor-2M-Cache-up-to-1_80-GHz E3930] |
| rowspan="1" | [http://ark.intel.com/products/96486/Intel-Atom-x5-E3930-Processor-2M-Cache-up-to-1_80-GHz E3930] |
||
| rowspan="1" | 6.5 |
| rowspan="1" | 6.5 |
||
| rowspan="1" | 1.3 |
| rowspan="1" | 1.3 |
||
| rowspan="1" | 550 |
| rowspan="1" | 550 |
||
|} |
|} |
||
===Automotive processors |
===Automotive processors (Apollo Lake) === |
||
There is also an Atom A3900 series exclusively for automotive customers with [[Automotive Electronics Council|AEC]]-Q100 qualification<ref name=intele3900a390020181201>{{cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-processor-e3900-a3900-series-datasheet-addendum.pdf?asset=14689|title=Intel Atom® Processor E3900 and A3900 Series Datasheet Addendum|publisher=Intel| |
There is also an Atom A3900 series exclusively for automotive customers with [[Automotive Electronics Council|AEC]]-Q100 qualification:<ref name=intele3900a390020181201>{{cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-processor-e3900-a3900-series-datasheet-addendum.pdf?asset=14689|title=Intel Atom® Processor E3900 and A3900 Series Datasheet Addendum|publisher=Intel|access-date=12 January 2018}}</ref> |
||
{| class="wikitable" |
{| class="wikitable" |
||
|- |
|- |
||
!rowspan="2" | Target<br>segment |
!rowspan="2" | Target<br />segment |
||
!rowspan="2" | Cores<br>( |
!rowspan="2" | Cores<br />(threads) |
||
!colspan="2" rowspan="2" | Processor<br> |
!colspan="2" rowspan="2" | Processor<br />branding & model |
||
!colspan |
! colspan="2" | GPU model |
||
!rowspan="2" | TDP |
!rowspan="2" | TDP |
||
(W) |
|||
!colspan="2" | CPU [[Clock rate]] |
|||
!colspan="2" | |
!colspan="2" | CPU freq. |
||
(GHz) |
|||
!rowspan="2" | [[CPU cache#Multi-level caches|L2<br>Cache]] |
|||
! |
!colspan="2" | GPU freq. |
||
(MHz) |
|||
!rowspan="2" | Price<br>(USD) |
|||
!rowspan="2" | [[CPU cache#Multi-level caches|L2<br />cache]] |
|||
!rowspan="2" | Release<br />date |
|||
!rowspan="2" | Price<br />(USD) |
|||
|- |
|- |
||
!Brand name &<br />model number |
|||
!EU |
|||
! Base |
! Base |
||
! Turbo |
! Turbo |
||
Line 419: | Line 401: | ||
| rowspan="2" | Atom x7 |
| rowspan="2" | Atom x7 |
||
| rowspan="1" | A3960 |
| rowspan="1" | A3960 |
||
| rowspan="2" | [[Intel HD and Iris Graphics| |
| rowspan="2" | [[Intel HD and Iris Graphics|HD Graphics 505]] |
||
| rowspan="2" | |
| rowspan="2" | 18 |
||
| rowspan="1" | 12.5 |
| rowspan="1" | 12.5 |
||
| rowspan="1" | 1.9 |
| rowspan="1" | 1.9 |
||
| rowspan="1" | 2.4 |
| rowspan="1" | 2.4 |
||
| rowspan="1" | 600 |
| rowspan="1" | 600 |
||
| rowspan="1" | 750 |
| rowspan="1" | 750 |
||
| rowspan="4" | 2 MB |
| rowspan="4" | 2 MB |
||
| rowspan="4" | |
| colspan="2" rowspan="4" | ? |
||
| rowspan="4" | |
|||
|- |
|- |
||
| rowspan="1" | A3950 |
| rowspan="1" | A3950 |
||
| rowspan="1" | 9.5 |
| rowspan="1" | 9.5 |
||
| rowspan="2" | 1.6 |
| rowspan="2" | 1.6 |
||
| rowspan="1" | 2.0 |
| rowspan="1" | 2.0 |
||
| rowspan="1" | 500 |
| rowspan="1" | 500 |
||
| rowspan="1" | 650 |
| rowspan="1" | 650 |
||
|- |
|- |
||
| rowspan="2" | Atom x5 |
| rowspan="2" | Atom x5 |
||
| rowspan="1" | A3940 |
| rowspan="1" | A3940 |
||
| rowspan="2" | [[Intel HD and Iris Graphics| |
| rowspan="2" | [[Intel HD and Iris Graphics|HD Graphics 500]] |
||
| rowspan="2" | |
| rowspan="2" | 12 |
||
| rowspan="1" | 8 |
| rowspan="1" | 8 |
||
| rowspan="2" | 1.8 |
| rowspan="2" | 1.8 |
||
| rowspan="2" | 400 |
| rowspan="2" | 400 |
||
| rowspan="1" | 600 |
| rowspan="1" | 600 |
||
|- |
|- |
||
| rowspan="1" | 2 (2) |
| rowspan="1" | 2 (2) |
||
| rowspan="1" | A3930 |
| rowspan="1" | A3930 |
||
| rowspan="1" | 6 |
| rowspan="1" | 6 |
||
| rowspan="1" | 1.3 |
| rowspan="1" | 1.3 |
||
| rowspan="1" | 550 |
| rowspan="1" | 550 |
||
|} |
|} |
||
===Tablet processors |
===Tablet processors (Willow Trail) === |
||
Willow Trail platform was canceled. Apollo Lake will be offered instead.<ref name=anandtech20160429>{{cite web|url=http://www.anandtech.com/show/10288/intel-broxton-sofia-smartphone-socs-cancelled |title=Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Cancelled|author= Ryan Smith & Ian Cutress |publisher=Anandtech.com |date=2016-04-29}}</ref> |
Willow Trail platform was canceled. Apollo Lake will be offered instead.<ref name=anandtech20160429>{{cite web|url=http://www.anandtech.com/show/10288/intel-broxton-sofia-smartphone-socs-cancelled |title=Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Cancelled|author= Ryan Smith & Ian Cutress |publisher=Anandtech.com |date=2016-04-29}}</ref> |
||
Line 473: | Line 454: | ||
[[Category:Intel x86 microprocessors]] |
[[Category:Intel x86 microprocessors]] |
||
[[Category:Intel microarchitectures]] |
[[Category:Intel microarchitectures]] |
||
[[Category:X86 microarchitectures]] |
|||
[[Category:Computer-related introductions in 2016]] |
Latest revision as of 02:46, 25 February 2024
General information | |
---|---|
Product code |
|
Architecture and classification | |
Technology node | 14 nm |
Instructions | x86-64, Intel 64 |
Extensions | |
Physical specifications | |
Cores |
|
Products, models, variants | |
Brand name(s) | |
History | |
Predecessor(s) | Airmont (die shrink) |
Successor(s) | Goldmont Plus (optimization) |
Goldmont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. They allow only one thread per core.
The Apollo Lake platform with 14 nm Goldmont core was unveiled at the Intel Developer Forum (IDF) in Shenzhen, China, April 2016.[1] The Goldmont architecture borrows heavily from the Skylake Core processors, so it offers a more than 30 percent performance boost compared to the previous Braswell platform, and it can be used to implement power-efficient low-end devices including Cloudbooks, 2-in-1 netbooks, small PCs, IP cameras, and in-car entertainment systems.[2][3]
Design[edit]
Goldmont is the 2nd generation out-of-order low-power Atom microarchitecture designed for the entry level desktop and notebook computers.[4] Goldmont is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the Intel Gen9 graphics architecture introduced with the Skylake.
The Goldmont microarchitecture builds on the success of the Silvermont microarchitecture, and provides the following enhancements:
- An out-of-order execution engine with a 3-wide superscalar pipeline.[5] Specifically:
- The decoder can decode 3 instructions per cycle.
- The microcode sequencer can send 3 µops per cycle for allocation into the reservation stations.
- Retirement supports a peak rate of 3 per cycle.
- Enhancement in branch prediction which de-couples the fetch pipeline from the instruction decoder.
- Larger out-of-order execution window and buffers that enable deeper out-of-order execution across integer, FP/SIMD, and memory instruction types.
- Fully out-of-order memory execution and disambiguation. The Goldmont microarchitecture can execute one load and one store per cycle (compared to one load or one store per cycle in the Silvermont microarchitecture). The memory execution pipeline also includes a second level TLB enhancement with 512 entries for 4KB pages.
- Integer execution cluster in the Goldmont microarchitecture provides three pipelines and can execute up to three simple integer ALU operations per cycle.
- SIMD integer and floating-point instructions execute in a 128-bit wide engine. Throughput and latency of many instructions have improved, including PSHUFB with 1-cycle throughput (versus 5 cycles for Silvermont microarchitecture) and many other SIMD instructions with doubled throughput.
- Throughput and latency of instructions for accelerating encryption/decryption (AES) and carry-less multiplication (PCLMULQDQ) have been improved significantly in the Goldmont microarchitecture.
- The Goldmont microarchitecture provides new instructions with hardware accelerated secure hashing algorithm, SHA1 and SHA256.
- The Goldmont microarchitecture also adds support for the RDSEED instruction for random number generation meeting the NIST SP800-90C standard.
- PAUSE instruction latency is optimized to enable better power efficiency.
Technology[edit]
- A 14 nm manufacturing process
- System on chip architecture
- 3D tri-gate transistors
- Consumer chips up to quad-cores
- Supports SSE4.2 instruction set
- Supports Intel AESNI and PCLMUL instructions
- Supports Intel RDRAND and RDSEED instructions
- Supports Intel SHA extensions
- Supports Intel MPX (Memory Protection Extensions)
- Gen 9 Intel HD Graphics with DirectX 12, OpenGL 4.6 with latest Windows 10 driver update[6] (OpenGL 4.5 on Linux[7]), OpenGL ES 3.2 and OpenCL 2.0 support.
- HEVC Main10 & VP9 Profile0 hardware decoding support
- 10 W thermal design power (TDP) Desktop or Server processors
- 4.0 to 6.0 W TDP mobile processors
- eMMC 5.0 technology to connect to NAND flash storage
- USB 3.1 & USB-C specification
- Support for DDR3L, LPDDR3, and LPDDR4 memory
- Integrated Sensor Hub (ISH) which can sample and combine data from individual sensors and operate independently when the host platform is in a low power state
- Image Signal Processor (ISP) supporting four concurrent camera streams
- Audio controller supporting HD Audio and LPE Audio
- Trusted Execution Engine 3.0 security subsystem
Erratum[edit]
Similar to the previous Silvermont generation, design flaws were found in processor circuitry, resulting in cease of operation when processors are actively used for several years. An Erratum named APL46 "System May Experience Inability to Boot or May Cease Operation"[8] was added to documentation in June 2017, stating that low pin count (LPC), real time clock (RTC), SD card and GPIO interfaces may stop functioning.
Mitigations[9] were found to limit impact on systems. A firmware update for the LPC bus called LPC_CLKRUN# reduces the utilization of the LPC interface, which in turn decreases (but does not eliminate) LPC bus degradation – some systems are however not compatible with this new firmware. It is recommended not to use SD cards as boot devices, and to remove the card from the system when not in use; other possible solutions being using only UHS-I cards and operating them at 1.8 V.
Congatec also states the issues impacts USB buses and eMMC, although those are not mentioned in Intel's public documentation. USB should have a maximum of 12% active time and there is a 60TB transmit traffic life expectancy over the lifetime of the port. eMMC should have a maximum of 33% active time and should be set to D3 device low power state by the operating system when not in use. Newer designs such as Atom C3000 Denverton do not seem to be affected.[10]
List of Goldmont processors[edit]
Desktop processors (Apollo Lake)[edit]
List of desktop processors as follows:[3][11]
Target segment |
Cores (threads = cores) |
Processor branding & model |
GPU model | TDP
(W) |
CPU freq.
(GHz) |
GPU freq.
(MHz) |
L2 cache |
Release date |
Price (USD) | ||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Brand name & model number |
EU | Base | Turbo | Base | Turbo | ||||||||
Desktop | 4 (4) | Pentium | J4205 | HD Graphics 505 | 18 | 10 | 1.5 | 2.6 | 250 | 800 | 2 MB | Q3 2016 | $161 |
Celeron | J3455 | HD Graphics 500 | 12 | 2.3 | 750 | $107 | |||||||
2 (2) | J3355 | 2.0 | 2.5 | 700 |
Server processors (Denverton)[edit]
Target segment |
Cores
(threads) |
Processor branding & model |
TDP
(W) |
CPU freq.
(GHz) |
L2 cache |
DDR4 speed | Release date |
Price (USD) | ||
---|---|---|---|---|---|---|---|---|---|---|
Base | Turbo | |||||||||
Server | 16 (16) | Atom | C3958[12][13] | 31 | 2.0 | 16 MB | 2400 | Q3 2017 | $449 | |
16 (16) | C3955[12] | 32 | 2.1 | 2.4 | $434 | |||||
12 (12) | C3858[12] | 25 | 2.0 | 12 MB | $332 | |||||
12 (12) | C3850[12] | 2.1 | 2.4 | $323 | ||||||
12 (12) | C3830[12] | 21 | 1.9 | 2.3 | 2133 | $289 | ||||
12 (12) | C3808[12] | 25 | 2.0 | $369 | ||||||
8 (8) | C3758[12] | 2.2 | 16 MB | 2400 | $193 | |||||
8 (8) | C3750[12] | 21 | 2.2 | 2.4 | $171 | |||||
8 (8) | C3708[12] | 17 | 1.7 | 2133 | $209 | |||||
4 (4) | C3558[12] | 16 | 2.2 | 8 MB | $86 | |||||
4 (4) | C3538[12] | 15 | 2.1 | $75 | ||||||
4 (4) | C3508[12] | 11.25 | 1.6 | 1866 | $86 | |||||
2 (2) | C3338[12] | 9 | 1.5 | 2.2 | 4 MB | Q1 2017 | $27 | |||
2 (2) | C3308[12] | 9.5 | 1.6 | 2.1 | Q3 2017 | $32 |
Mobile processors (Apollo Lake)[edit]
List of mobile processors as follows:[3][11]
Target segment |
Cores (Threads) |
Processor branding & model |
GPU model | TDP
(W) |
CPU freq.
(GHz) |
GPU freq.
(MHz) |
L2 cache |
Release date |
Price (USD) | ||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Brand name & model number |
EU | Base | Turbo | Base | Turbo | ||||||||
Mobile | 4 (4) | Pentium | N4200 | HD Graphics 505 | 18 | 6 | 1.1 | 2.5 | 200 | 750 | 2 MB | Q3 2016 | $161 |
Celeron | N3450 | HD Graphics 500 | 12 | 2.2 | 700 | $107 | |||||||
2 (2) | N3350 | 2.4 | 650 |
Embedded processors (Apollo Lake)[edit]
List of embedded processors as follows:
Target segment |
Cores (threads) |
Processor branding & model |
GPU model | TDP
(W) |
CPU freq.
(GHz) |
GPU freq.
(MHz) |
L2 cache |
Release date |
Price (USD) | ||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Brand name & model number |
EU | Base | Turbo | Base | Turbo | ||||||||
Embedded | 4 (4) | Atom x7 | E3950 | HD Graphics 505 | 18 | 12 | 1.6 | 2.0 | 500 | 650 | 2 MB | Q3 2016 | ? |
Atom x5 | E3940 | HD Graphics 500 | 12 | 9.5 | 1.8 | 400 | 600 | ||||||
2 (2) | E3930 | 6.5 | 1.3 | 550 |
Automotive processors (Apollo Lake)[edit]
There is also an Atom A3900 series exclusively for automotive customers with AEC-Q100 qualification:[14]
Target segment |
Cores (threads) |
Processor branding & model |
GPU model | TDP
(W) |
CPU freq.
(GHz) |
GPU freq.
(MHz) |
L2 cache |
Release date |
Price (USD) | ||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Brand name & model number |
EU | Base | Turbo | Normal | Turbo | ||||||||
Automotive | 4 (4) | Atom x7 | A3960 | HD Graphics 505 | 18 | 12.5 | 1.9 | 2.4 | 600 | 750 | 2 MB | ? | |
A3950 | 9.5 | 1.6 | 2.0 | 500 | 650 | ||||||||
Atom x5 | A3940 | HD Graphics 500 | 12 | 8 | 1.8 | 400 | 600 | ||||||
2 (2) | A3930 | 6 | 1.3 | 550 |
Tablet processors (Willow Trail)[edit]
Willow Trail platform was canceled. Apollo Lake will be offered instead.[15]
See also[edit]
- List of Intel CPU microarchitectures
- List of Intel Pentium microprocessors
- List of Intel Celeron microprocessors
- List of Intel Atom microprocessors
- Atom (system on chip)
References[edit]
- ^ Eric Brown (2016-04-18). ""Apollo Lake" Atoms to offer graphics-rich Goldmont cores". Hackerboards.com. Archived from the original on 2016-06-20. Retrieved 2016-06-11.
- ^ Anton Shilov (2016-04-15). "Intel Unveils New Low-Cost PC Platform: Apollo Lake with 14nm Goldmont Cores". Anandtech.com. Retrieved 2016-06-11.
- ^ a b c Alexander Fagot/ Allen Ngo (2016-06-07). "Intel claims Apollo Lake will be 30 percent faster than Braswell". Notebookcheck.net. Retrieved 2016-06-11.
- ^ Anton Shilov (2015-06-10). "Intel preps 'Apollo Lake' CPUs with 'Goldmont' cores, Gen9 graphics". Retrieved 2016-06-11.
- ^ Kanter, David. "Goldmont Takes Atom to 14nm". The Linley Group. The Linley Group. Retrieved 17 August 2017.
- ^ "Release Notes : DRIVER VERSION: 31.0.101.2115" (PDF). Downloadmirror.intel.com. Retrieved 29 December 2022.
- ^ "Mesa 13.0 Released With Intel OpenGL 4.5, RADV Radeon Vulkan Driver - Phoronix". Phoronix.com.
- ^ "Intel® Pentium® and Celeron® Processor N- and J- Series Specification Update" (PDF). Retrieved 2018-04-13.
- ^ "Errata sheet - congatec Apollo Lake designs" (PDF). congatec. 2017-07-26. Archived from the original (PDF) on 2018-04-15. Retrieved 2018-04-15.
- ^ "Intel® Atom® Processor C3000 Product Family Specification Update" (PDF). Retrieved 2018-04-13.
- ^ a b Gennadiy Shvets (2016-06-09). "Model numbers of Apollo Lake processors revealed". cpu-world.com. Retrieved 2016-06-11.
- ^ a b c d e f g h i j k l m n Kennedy, Patrick (15 August 2017). "Intel Atom C3000 Series Launch SKUs and Differentiation". Serve the Home. Retrieved 15 August 2017.
- ^ Cutress, Ian (15 August 2017). "More Denverton Noise: Gigabyte's MA1-ST0 Features Unannounced 16-Core C3958". Anandtech. Retrieved 15 August 2017.
- ^ "Intel Atom® Processor E3900 and A3900 Series Datasheet Addendum" (PDF). Intel. Retrieved 12 January 2018.
- ^ Ryan Smith & Ian Cutress (2016-04-29). "Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Cancelled". Anandtech.com.