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The '''9S08''' ('''68HCS08''' or '''S08''' for short) is a [[8-bit]] [[microcontroller]] (µC) family originally from [[Motorola]], now produced by [[Freescale Semiconductor]],<ref>http://www.freescale.com/webapp/sps/site/homepage.jsp?code=8BITMCU</ref> descended from the [[Motorola 6800]] microprocessor. It is a [[Complex instruction set computer|CISC]] microcontroller. The 9S08 devices are more powerful and usually less expensive than the aging [[Motorola 68HC05|68HC05]] microcontrollers, and are found in almost any type of embedded systems. The larger members, which include an [[Memory_management_unit|MMU]], offer up to 128KB of [[Flash memory|paged flash]], and 8KB of [[Random-access memory|RAM]]. The paging scheme used allows for a theoretical maximum of 4MB of flash.
The '''9S08''' ('''68HCS08''' or '''S08''' for short) is an [[8-bit]] [[microcontroller]] (µC) family originally produced by [[Motorola]], later by [[Freescale Semiconductor]],<ref>{{Cite web|title=NXP Semiconductors {{!}} Automotive, Security, IoT|url=https://www.nxp.com/|access-date=2021-02-18|website=www.nxp.com}}</ref> and currently by [[NXP]], descended from the [[Motorola 6800]] microprocessor. It is a [[Complex instruction set computer|CISC]] microcontroller. A slightly extended variant of the [[Freescale 68HC08|68HC08]], it shares upward compatibility with the aging [[Motorola 68HC05|68HC05]] microcontrollers, and is found in almost any type of embedded systems. The larger members offer up to 128&nbsp;KiB of [[Flash memory|flash]], and 8&nbsp;KiB of [[Random-access memory|RAM]] via a simple [[memory management unit]] (MMU) which allows [[bank-switching]] 16&nbsp;KiB of the address space and an address/data register pair which allows data fetches from any address. The paging scheme used allows for a theoretical maximum of 4&nbsp;MB of flash.<ref>{{cite tech report |title=Understanding Memory Paging in 9S08 Devices |first1=Eduardo |last1=Viramontes |first2=Rick |last2=Li |publisher=Freescale Technical Support |type=Application Note|id=AN3730 |version=Rev. 0 |date=May 2008 |url=https://www.nxp.com/docs/en/application-note/AN3730.pdf}}</ref>


MMU equipped variants offer two extra CPU instructions, CALL and RTC, which are used instead of JSR and RTS respectively when dealing with subroutines placed in paged memory, allowing direct page-to-page subroutine calls. In a single atomic operation, CALL saves and RTC restores not only the PC but also one extra address byte, the PPAGE (program page) byte. Because of this extra byte, and to also keep the stack balanced, a subroutine ending with RTC must always be called with CALL, even if it resides in the same memory page.
MMU-equipped variants offer two extra CPU instructions, CALL and RTC, which are used instead of JSR and RTS respectively when dealing with subroutines placed in paged memory, allowing direct page-to-page subroutine calls. In a single atomic operation, CALL saves and RTC restores not only the PC but also one extra address byte, the PPAGE (program page) byte. Because of this extra byte, and to also keep the stack balanced, a subroutine ending with RTC must always be called with CALL, even if it resides in the same memory page.


Internally, the 9S08 [[instruction set]] is upward compatible with the 6805, with the addition of [[Call stack|stack]] indexed [[addressing mode]]s. (Instructions using the SP [[Processor register|register]] have [[opcode]]s prefixed with the byte 0x9E). It has a single eight-bit [[accumulator (computing)|accumulator]], A, one eight-bit [[index register]], X, or one sixteen-bit index registers, HX (formed from the combination of H and X registers), a [[condition code register]], a [[16-bit]] [[stack pointer]], and a [[program counter]]. For compatibility with the 6805 which does not have an H register, the most significant byte of the HX register, H, is cleared during reset, and H is the only register not stacked automatically when entering any ISR ([[Interrupt handler|Interrupt Service Routine]]). Some instructions treat the H and X registers as a combined 16-bit HX register. Unlike the 6805, the stack can be placed anywhere in memory using appropriate instructions.
Internally, the 9S08 [[instruction set]] is upward compatible with the 6805, with the addition of [[Call stack|stack]] indexed [[addressing mode]]s. (Instructions using the SP [[Processor register|register]] have [[opcode]]s prefixed with the byte 0x9E). It has a single eight-bit [[accumulator (computing)|accumulator]], A, one sixteen-bit [[index register]], HX (whose lower half, X, is used in isolation by 6805-compatible instructions), a [[condition code register]], a [[16-bit]] [[stack pointer]], and a [[program counter]]. For compatibility with the 6805 which does not have an H register, the most significant byte of the HX register, H, is cleared during reset, and H is the only register not stacked automatically when entering any ISR ([[Interrupt handler|Interrupt Service Routine]]).<ref>{{cite manual |title=HCS08 Family Reference Manual |url=https://cache.freescale.com/files/microcontrollers/doc/ref_manual/HCS08RMV1.pdf |id=HCS08RMv1/D |version=Rev. 2 |date=May 2007 |publisher=Freescale Semiconductor}}</ref>{{Rp|81}} Unlike the 6805, the stack can be placed anywhere in memory using appropriate instructions.


The standard method of programming or debugging the 9S08 family is via a standard 6-pin [[Background Debug Mode interface|BDM]] interface (only one pin is used for communication with the microcontroller).
The standard method of programming or debugging the 9S08 family is via a standard six-pin [[Background Debug Mode interface|BDM]] interface (only one pin is used for communication with the microcontroller).


A wide variety of peripherals is available for different members and/or packages. SCI, SPI, 8/10/12-bit A/D, (C)PWM, Input Captures, and Output Compares are common with most members, but no external bus is available. Some members come with built-in [[CAN_bus|CAN]] controller.
A wide variety of peripherals is available for different members and/or packages. SCI, SPI, 8/10/12-bit A/D, (C)PWM, Input Captures, and Output Compares are common with most members, but no external bus is available. Some members come with a built-in [[CAN_bus|CAN]] controller.

== Compiler support ==

The S08 is partly supported (e.g., no MMU support) by the free C compiler [[Small_Device_C_Compiler|SDCC]] and fully by [[CodeWarrior]].


== References ==
== References ==
Line 15: Line 19:
== External links ==
== External links ==
{{Refbegin}}
{{Refbegin}}
* [https://www.nxp.com/products/processors-and-microcontrollers/additional-architectures/8-bit-s08-mcus:HCS08 HCS08/9S08 Processor Families]
* [http://www.aspisys.com/asm8.htm Win/Linux-based freeware macro cross-assembler (ASM8)]
* [http://www.aspisys.com/asm8.htm Win/Linux/DOS-based freeware macro cross-assembler (ASM8)]
* [http://www.aspisys.com/code Example assembly language code written for ASM8]
* [http://www.aspisys.com/code Example assembly language code written for ASM8]
{{Refend}}
{{Refend}}


{{Motorola microcontrollers}}
{{Motorola_microcontrollers}}


[[Category:Microcontrollers]]
[[Category:Motorola microcontrollers]]
[[Category:Motorola]]
[[Category:Freescale Semiconductor microcontrollers]]
[[Category:NXP Semiconductors microcontrollers]]

Revision as of 06:22, 25 July 2023

The 9S08 (68HCS08 or S08 for short) is an 8-bit microcontroller (µC) family originally produced by Motorola, later by Freescale Semiconductor,[1] and currently by NXP, descended from the Motorola 6800 microprocessor. It is a CISC microcontroller. A slightly extended variant of the 68HC08, it shares upward compatibility with the aging 68HC05 microcontrollers, and is found in almost any type of embedded systems. The larger members offer up to 128 KiB of flash, and 8 KiB of RAM via a simple memory management unit (MMU) which allows bank-switching 16 KiB of the address space and an address/data register pair which allows data fetches from any address. The paging scheme used allows for a theoretical maximum of 4 MB of flash.[2]

MMU-equipped variants offer two extra CPU instructions, CALL and RTC, which are used instead of JSR and RTS respectively when dealing with subroutines placed in paged memory, allowing direct page-to-page subroutine calls. In a single atomic operation, CALL saves and RTC restores not only the PC but also one extra address byte, the PPAGE (program page) byte. Because of this extra byte, and to also keep the stack balanced, a subroutine ending with RTC must always be called with CALL, even if it resides in the same memory page.

Internally, the 9S08 instruction set is upward compatible with the 6805, with the addition of stack indexed addressing modes. (Instructions using the SP register have opcodes prefixed with the byte 0x9E). It has a single eight-bit accumulator, A, one sixteen-bit index register, HX (whose lower half, X, is used in isolation by 6805-compatible instructions), a condition code register, a 16-bit stack pointer, and a program counter. For compatibility with the 6805 which does not have an H register, the most significant byte of the HX register, H, is cleared during reset, and H is the only register not stacked automatically when entering any ISR (Interrupt Service Routine).[3]: 81  Unlike the 6805, the stack can be placed anywhere in memory using appropriate instructions.

The standard method of programming or debugging the 9S08 family is via a standard six-pin BDM interface (only one pin is used for communication with the microcontroller).

A wide variety of peripherals is available for different members and/or packages. SCI, SPI, 8/10/12-bit A/D, (C)PWM, Input Captures, and Output Compares are common with most members, but no external bus is available. Some members come with a built-in CAN controller.

Compiler support

The S08 is partly supported (e.g., no MMU support) by the free C compiler SDCC and fully by CodeWarrior.

References

  1. ^ "NXP Semiconductors | Automotive, Security, IoT". www.nxp.com. Retrieved 2021-02-18.
  2. ^ Viramontes, Eduardo; Li, Rick (May 2008). Understanding Memory Paging in 9S08 Devices (PDF) (Application Note). Rev. 0. Freescale Technical Support. AN3730.
  3. ^ HCS08 Family Reference Manual (PDF). Rev. 2. Freescale Semiconductor. May 2007. HCS08RMv1/D.

External links

Retrieved from "https://en.wikipedia.org/w/index.php?title=Motorola_S08&oldid=1167024266"