Motorola 68020
The Motorola 68020 is the first true 32-bit microprocessor in the Motorola 68000 family . It came onto the market in 1984 and consists of around 190,000 transistors.
architecture
In contrast to the 68000 , which can be programmed like a 32-bit CPU , but internally only has a 16-bit ALU and combines the 32-bit commands from several 16-bit steps, and only via a 16 -Bit data bus , the 68020 has a 32-bit data bus and a 32-bit ALU, which gives it an enormous speed advantage over the older members of the 68000 family.
While the 68000 can only multiply two 16-bit data words to form a 32-bit data word, the ALU of the 68020 can also multiply two 32-bit data words to form a 64-bit data word. The same applies to division.
Since it is also one in the 68020 coprocessor - Interface with matching FPU (MC68881, MC68882 later) and matching MMU gave (MC68851), the instruction set to was floating point commands and MMU commands extended. For the former, commands of the 68000 instruction set that were to be treated by trap were previously used, so that the corresponding code could also be executed with an FPU emulation on a 68000 (albeit with a considerably reduced processing speed). The CPU decoded the commands intended for the FPU and MMU in the microcode and then passed them on to the corresponding modules via the coprocessor interface. In order to keep the number of lines required low, the FPU "listened" to the data bus and was able to control it directly for memory operations; the MMU was connected to the memory interface on the address lines between the CPU and the memory controller and modified the addresses issued by the CPU ( this slowed down memory access when using the MMU, which was only improved by the integrated MMU of the MC68030).
In addition to the enlargement of the ALU, the 68020 also received a more complex addressing unit or address generator , which gave it extremely complex types of addressing, especially for the time (late 1980s) . The effective address for reading a data word from the main memory can be formed as follows: The content of a register added with a constant results in an address at which a data word is read, to which a further constant and an optional 0, 1, 2 or 3 Bits shifted register are added. The result is the address at which it is actually read. Syntax: [(bd, An.x), od, Rn.x*sc]
Such types of addressing are particularly useful when tracing pointers to structures in vectors.
These very complex types of addressing with designations such as "indirectly indexed addressing" represented the high point of the architecture of CISC processors, but at the same time also their turning point: These types of addressing require a lot of microcode and clock cycles (a first address had to be created first, which then was used for a memory access to the base address before the value read there could be changed by the possibly bit-shifted value of the index register in order to form the address required for the access) in order to be executed. At the same time, almost no compiler manufacturer implemented them quickly enough to be of effective use. Code that used these types of addressing could not be executed on older 68000 processors and at the same time was very difficult to debug (you no longer had a register to look into and check the address value actually used for memory access). Accordingly, developments in RISC architectures began almost at the same time , which managed with significantly fewer commands and addressing types. Only the development of multi-layer cache systems with effective management brought the CISC processors back into an advantage over their opponents from RISC families at the end of the 1990s.
Compared to the predecessor MC68010 , a level 1 instruction cache of 256 bytes was added.
With the MC68020, the address bus is 32 bits, so that a total of 4 GiB memory can be addressed. The MC68EC020 has a reduced address bus of 24 bits, which means that only 16 MiB of memory can be addressed.
use
Well-known computer systems in which Motorola 68020 processors were used are the Apple Macintosh II , the Sun 3-series workstations, the Amiga 1200 and the Amiga CD³² , the latter both with an MC68EC020 processor with approx. 14 MHz, and the control compensation computer of the Eurofighter , without which it could not be kept stable in the air.
successor
The successor to the MC68020 is the Motorola 68030 . The biggest change was to include the MMU in the chip, so that the delay in bus access by the MMU was eliminated. The successor, the Motorola 68040 , then also integrated the FPU into the main processor.
