Instructions per cycle

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The units of measurement Instructions per Cycle ( IPC ; German  instructions per cycle ) denotes the number of commands executed by a processor in one clock cycle . The IPC value is the result of the way the tail unit works .

An upper limit for an IPC value indicates the scalarity of a processor, but an IPC value is usually an average value . To calculate an IPC value, many commands are executed and these are often divided by the number of clock cycles required for this (see arithmetic mean ), but other calculations of an average value are also conceivable. The resulting IPC value, however, depends on the specific machine program and the micro-architecture . One program can achieve the same IPC value on two different microarchitectures, while another program on the same microarchitectures provides different values.

The IPC value (which was formed by an arithmetic mean) multiplied by the clock frequency gives the number of commands executed per second .

It should be noted that some manufacturers do not mean the period duration of the clock signal by a “cycle” or “clock cycle” , but rather a multiple of it (see Double Data Rate ).

The Cycles per Instruction ( CPI ) value is also often found in the literature .


  • Konrad Zuse's Z1 had z. B. an IPC in the range from 0.05 to 1. The Z1 is a scalar micro- architecture, because its IPC value is ideally one.
  • MOS Technology 6502: 0.43 MIPS / MHz / Core
  • Intel 8086: 0.06 MIPS / MHz / Core
  • Motorola 68060: 1.33 MIPS / MHz / Core
  • AMD Phenom II X6 1100T: 3.9 MIPS / MHz / Core
  • Intel Core i5 8250U: 10.3 MIPS / MHz / Core
  • AMD Ryzen 7 1800X: 10.6 MIPS / MHz / Core

See also

Individual evidence

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